@@ -762,8 +762,12 @@ i2c_status_e i2c_master_write(i2c_t *obj, uint8_t dev_address,
762762 if ((delta > I2C_TIMEOUT_TICK )
763763 || ((err & HAL_I2C_ERROR_TIMEOUT ) == HAL_I2C_ERROR_TIMEOUT )) {
764764 ret = I2C_TIMEOUT ;
765- } else if (err != HAL_I2C_ERROR_NONE ) {
766- ret = I2C_ERROR ;
765+ } else {
766+ if ((err & HAL_I2C_ERROR_AF ) == HAL_I2C_ERROR_AF ) {
767+ ret = I2C_NACK_DATA ;
768+ } else if (err != HAL_I2C_ERROR_NONE ) {
769+ ret = I2C_ERROR ;
770+ }
767771 }
768772 }
769773 }
@@ -784,7 +788,7 @@ i2c_status_e i2c_slave_write_IT(i2c_t *obj, uint8_t *data, uint16_t size)
784788
785789 // Protection to not override the TxBuffer
786790 if (size > I2C_TXRX_BUFFER_SIZE ) {
787- ret = I2C_ERROR ;
791+ ret = I2C_DATA_TOO_LONG ;
788792 } else {
789793 // Check the communication status
790794 for (i = 0 ; i < size ; i ++ ) {
@@ -832,8 +836,12 @@ i2c_status_e i2c_master_read(i2c_t *obj, uint8_t dev_address, uint8_t *data, uin
832836 if ((delta > I2C_TIMEOUT_TICK )
833837 || ((err & HAL_I2C_ERROR_TIMEOUT ) == HAL_I2C_ERROR_TIMEOUT )) {
834838 ret = I2C_TIMEOUT ;
835- } else if (err != HAL_I2C_ERROR_NONE ) {
836- ret = I2C_ERROR ;
839+ } else {
840+ if ((err & HAL_I2C_ERROR_AF ) == HAL_I2C_ERROR_AF ) {
841+ ret = I2C_NACK_DATA ;
842+ } else if (err != HAL_I2C_ERROR_NONE ) {
843+ ret = I2C_ERROR ;
844+ }
837845 }
838846 }
839847 return ret ;
@@ -855,13 +863,13 @@ i2c_status_e i2c_IsDeviceReady(i2c_t *obj, uint8_t devAddr, uint32_t trials)
855863 ret = I2C_OK ;
856864 break ;
857865 case HAL_TIMEOUT :
858- ret = I2C_TIMEOUT ;
866+ ret = ( obj -> handle . State != HAL_I2C_STATE_READY ) ? I2C_TIMEOUT : I2C_NACK_ADDR ;
859867 break ;
860868 case HAL_BUSY :
861- ret = I2C_BUSY ;
869+ ret = ( obj -> handle . State != HAL_I2C_STATE_READY ) ? I2C_BUSY : I2C_NACK_ADDR ;
862870 break ;
863871 default :
864- ret = I2C_TIMEOUT ;
872+ ret = ( obj -> handle . State != HAL_I2C_STATE_READY ) ? I2C_ERROR : I2C_NACK_ADDR ;
865873 break ;
866874 }
867875 return ret ;
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