22 ******************************************************************************
33 * @file stm32f2xx_hal_adc.h
44 * @author MCD Application Team
5- * @version V1.2.1
6- * @date 14-April-2017
75 * @brief Header file of ADC HAL extension module.
86 ******************************************************************************
97 * @attention
@@ -449,60 +447,60 @@ typedef struct
449447 */
450448
451449/** @brief Reset ADC handle state
452- * @param __HANDLE__: ADC handle
450+ * @param __HANDLE__ ADC handle
453451 * @retval None
454452 */
455453#define __HAL_ADC_RESET_HANDLE_STATE (__HANDLE__ ) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
456454
457455/**
458456 * @brief Enable the ADC peripheral.
459- * @param __HANDLE__: ADC handle
457+ * @param __HANDLE__ ADC handle
460458 * @retval None
461459 */
462460#define __HAL_ADC_ENABLE (__HANDLE__ ) ((__HANDLE__)->Instance->CR2 |= ADC_CR2_ADON)
463461
464462/**
465463 * @brief Disable the ADC peripheral.
466- * @param __HANDLE__: ADC handle
464+ * @param __HANDLE__ ADC handle
467465 * @retval None
468466 */
469467#define __HAL_ADC_DISABLE (__HANDLE__ ) ((__HANDLE__)->Instance->CR2 &= ~ADC_CR2_ADON)
470468
471469/**
472470 * @brief Enable the ADC end of conversion interrupt.
473- * @param __HANDLE__: specifies the ADC Handle.
474- * @param __INTERRUPT__: ADC Interrupt.
471+ * @param __HANDLE__ specifies the ADC Handle.
472+ * @param __INTERRUPT__ ADC Interrupt.
475473 * @retval None
476474 */
477475#define __HAL_ADC_ENABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR1) |= (__INTERRUPT__))
478476
479477/**
480478 * @brief Disable the ADC end of conversion interrupt.
481- * @param __HANDLE__: specifies the ADC Handle.
482- * @param __INTERRUPT__: ADC interrupt.
479+ * @param __HANDLE__ specifies the ADC Handle.
480+ * @param __INTERRUPT__ ADC interrupt.
483481 * @retval None
484482 */
485483#define __HAL_ADC_DISABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR1) &= ~(__INTERRUPT__))
486484
487485/** @brief Check if the specified ADC interrupt source is enabled or disabled.
488- * @param __HANDLE__: specifies the ADC Handle.
489- * @param __INTERRUPT__: specifies the ADC interrupt source to check.
486+ * @param __HANDLE__ specifies the ADC Handle.
487+ * @param __INTERRUPT__ specifies the ADC interrupt source to check.
490488 * @retval The new state of __IT__ (TRUE or FALSE).
491489 */
492490#define __HAL_ADC_GET_IT_SOURCE (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__))
493491
494492/**
495493 * @brief Clear the ADC's pending flags.
496- * @param __HANDLE__: specifies the ADC Handle.
497- * @param __FLAG__: ADC flag.
494+ * @param __HANDLE__ specifies the ADC Handle.
495+ * @param __FLAG__ ADC flag.
498496 * @retval None
499497 */
500498#define __HAL_ADC_CLEAR_FLAG (__HANDLE__ , __FLAG__ ) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
501499
502500/**
503501 * @brief Get the selected ADC's flag status.
504- * @param __HANDLE__: specifies the ADC Handle.
505- * @param __FLAG__: ADC flag.
502+ * @param __HANDLE__ specifies the ADC Handle.
503+ * @param __FLAG__ ADC flag.
506504 * @retval None
507505 */
508506#define __HAL_ADC_GET_FLAG (__HANDLE__ , __FLAG__ ) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
@@ -610,7 +608,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
610608
611609/**
612610 * @brief Verification of ADC state: enabled or disabled
613- * @param __HANDLE__: ADC handle
611+ * @param __HANDLE__ ADC handle
614612 * @retval SET (ADC enabled) or RESET (ADC disabled)
615613 */
616614#define ADC_IS_ENABLE (__HANDLE__ ) \
@@ -620,7 +618,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
620618/**
621619 * @brief Test if conversion trigger of regular group is software start
622620 * or external trigger.
623- * @param __HANDLE__: ADC handle
621+ * @param __HANDLE__ ADC handle
624622 * @retval SET (software start) or RESET (external trigger)
625623 */
626624#define ADC_IS_SOFTWARE_START_REGULAR (__HANDLE__ ) \
@@ -629,7 +627,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
629627/**
630628 * @brief Test if conversion trigger of injected group is software start
631629 * or external trigger.
632- * @param __HANDLE__: ADC handle
630+ * @param __HANDLE__ ADC handle
633631 * @retval SET (software start) or RESET (external trigger)
634632 */
635633#define ADC_IS_SOFTWARE_START_INJECTED (__HANDLE__ ) \
@@ -646,7 +644,7 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
646644
647645/**
648646 * @brief Clear ADC error code (set it to error code: "no error")
649- * @param __HANDLE__: ADC handle
647+ * @param __HANDLE__ ADC handle
650648 * @retval None
651649 */
652650#define ADC_CLEAR_ERRORCODE (__HANDLE__ ) \
@@ -736,89 +734,89 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
736734
737735/**
738736 * @brief Set ADC Regular channel sequence length.
739- * @param _NbrOfConversion_: Regular channel sequence length.
737+ * @param _NbrOfConversion_ Regular channel sequence length.
740738 * @retval None
741739 */
742740#define ADC_SQR1 (_NbrOfConversion_ ) (((_NbrOfConversion_) - (uint8_t)1) << 20U)
743741
744742/**
745743 * @brief Set the ADC's sample time for channel numbers between 10 and 18.
746- * @param _SAMPLETIME_: Sample time parameter.
747- * @param _CHANNELNB_: Channel number.
744+ * @param _SAMPLETIME_ Sample time parameter.
745+ * @param _CHANNELNB_ Channel number.
748746 * @retval None
749747 */
750748#define ADC_SMPR1 (_SAMPLETIME_ , _CHANNELNB_ ) ((_SAMPLETIME_) << (3U * (((uint32_t)((uint16_t)(_CHANNELNB_))) - 10U)))
751749
752750/**
753751 * @brief Set the ADC's sample time for channel numbers between 0 and 9.
754- * @param _SAMPLETIME_: Sample time parameter.
755- * @param _CHANNELNB_: Channel number.
752+ * @param _SAMPLETIME_ Sample time parameter.
753+ * @param _CHANNELNB_ Channel number.
756754 * @retval None
757755 */
758756#define ADC_SMPR2 (_SAMPLETIME_ , _CHANNELNB_ ) ((_SAMPLETIME_) << (3U * ((uint32_t)((uint16_t)(_CHANNELNB_)))))
759757
760758/**
761759 * @brief Set the selected regular channel rank for rank between 1 and 6.
762- * @param _CHANNELNB_: Channel number.
763- * @param _RANKNB_: Rank number.
760+ * @param _CHANNELNB_ Channel number.
761+ * @param _RANKNB_ Rank number.
764762 * @retval None
765763 */
766764#define ADC_SQR3_RK (_CHANNELNB_ , _RANKNB_ ) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 1U)))
767765
768766/**
769767 * @brief Set the selected regular channel rank for rank between 7 and 12.
770- * @param _CHANNELNB_: Channel number.
771- * @param _RANKNB_: Rank number.
768+ * @param _CHANNELNB_ Channel number.
769+ * @param _RANKNB_ Rank number.
772770 * @retval None
773771 */
774772#define ADC_SQR2_RK (_CHANNELNB_ , _RANKNB_ ) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 7U)))
775773
776774/**
777775 * @brief Set the selected regular channel rank for rank between 13 and 16.
778- * @param _CHANNELNB_: Channel number.
779- * @param _RANKNB_: Rank number.
776+ * @param _CHANNELNB_ Channel number.
777+ * @param _RANKNB_ Rank number.
780778 * @retval None
781779 */
782780#define ADC_SQR1_RK (_CHANNELNB_ , _RANKNB_ ) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * ((_RANKNB_) - 13U)))
783781
784782/**
785783 * @brief Enable ADC continuous conversion mode.
786- * @param _CONTINUOUS_MODE_: Continuous mode.
784+ * @param _CONTINUOUS_MODE_ Continuous mode.
787785 * @retval None
788786 */
789787#define ADC_CR2_CONTINUOUS (_CONTINUOUS_MODE_ ) ((_CONTINUOUS_MODE_) << 1U)
790788
791789/**
792790 * @brief Configures the number of discontinuous conversions for the regular group channels.
793- * @param _NBR_DISCONTINUOUSCONV_: Number of discontinuous conversions.
791+ * @param _NBR_DISCONTINUOUSCONV_ Number of discontinuous conversions.
794792 * @retval None
795793 */
796794#define ADC_CR1_DISCONTINUOUS (_NBR_DISCONTINUOUSCONV_ ) (((_NBR_DISCONTINUOUSCONV_) - 1U) << POSITION_VAL(ADC_CR1_DISCNUM))
797795
798796/**
799797 * @brief Enable ADC scan mode.
800- * @param _SCANCONV_MODE_: Scan conversion mode.
798+ * @param _SCANCONV_MODE_ Scan conversion mode.
801799 * @retval None
802800 */
803801#define ADC_CR1_SCANCONV (_SCANCONV_MODE_ ) ((_SCANCONV_MODE_) << 8U)
804802
805803/**
806804 * @brief Enable the ADC end of conversion selection.
807- * @param _EOCSelection_MODE_: End of conversion selection mode.
805+ * @param _EOCSelection_MODE_ End of conversion selection mode.
808806 * @retval None
809807 */
810808#define ADC_CR2_EOCSelection (_EOCSelection_MODE_ ) ((_EOCSelection_MODE_) << 10U)
811809
812810/**
813811 * @brief Enable the ADC DMA continuous request.
814- * @param _DMAContReq_MODE_: DMA continuous request mode.
812+ * @param _DMAContReq_MODE_ DMA continuous request mode.
815813 * @retval None
816814 */
817815#define ADC_CR2_DMAContReq (_DMAContReq_MODE_ ) ((_DMAContReq_MODE_) << 9U)
818816
819817/**
820818 * @brief Return resolution bits in CR1 register.
821- * @param __HANDLE__: ADC handle
819+ * @param __HANDLE__ ADC handle
822820 * @retval None
823821 */
824822#define ADC_GET_RESOLUTION (__HANDLE__ ) (((__HANDLE__)->Instance->CR1) & ADC_CR1_RES)
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