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variant: L4: add generic L4R5Z(G-I)Y, L4R9Z(G-I)Y, L4S5ZIY and L4S9ZIY
Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent 782e8c6 commit 27f33b7

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‎README.md‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -386,15 +386,19 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
386386
| :green_heart: | STM32L4A6ZG-P | Generic Board | *2.0.0* | |
387387
| :green_heart: | STM32L4R5VG<br>STM32L4R5VI | Generic Board | *2.0.0* | |
388388
| :green_heart: | STM32L4R5ZGTx<br>STM32L4R5ZITx | Generic Board | *2.0.0* | |
389+
| :yellow_heart: | STM32L4R5ZGYx<br>STM32L4R5ZIYx | Generic Board | **2.1.0** | |
389390
| :green_heart: | STM32L4R5ZI-P | Generic Board | *2.0.0* | |
390391
| :green_heart: | STM32L4R7VITx | Generic Board | *2.0.0* | |
391392
| :green_heart: | STM32L4R7ZITx | Generic Board | *2.0.0* | |
392393
| :green_heart: | STM32L4R9ZGJx<br>STM32L4R9ZIJx | Generic Board | *2.0.0* | |
394+
| :yellow_heart: | STM32L4R9ZGYx<br>STM32L4R9ZIYx | Generic Board | **2.1.0** | |
393395
| :green_heart: | STM32L4S5VI | Generic Board | *2.0.0* | |
394396
| :green_heart: | STM32L4S5ZITx | Generic Board | *2.0.0* | |
397+
| :yellow_heart: | STM32L4S5ZIYx | Generic Board | **2.1.0** | |
395398
| :green_heart: | STM32L4S7VI | Generic Board | *2.0.0* | |
396399
| :green_heart: | STM32L4S7ZITx | Generic Board | *2.0.0* | |
397400
| :green_heart: | STM32L4S9ZIJx | Generic Board | *2.0.0* | |
401+
| :yellow_heart: | STM32L4S9ZIYx | Generic Board | **2.1.0** | |
398402

399403
### Generic STM32L5 boards
400404

‎boards.txt‎

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4770,6 +4770,14 @@ GenL4.menu.pnum.GENERIC_L4R5ZGTX.build.board=GENERIC_L4R5ZGTX
47704770
GenL4.menu.pnum.GENERIC_L4R5ZGTX.build.product_line=STM32L4R5xx
47714771
GenL4.menu.pnum.GENERIC_L4R5ZGTX.build.variant=STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT
47724772

4773+
# Generic L4R5ZGYx
4774+
GenL4.menu.pnum.GENERIC_L4R5ZGYX=Generic L4R5ZGYx
4775+
GenL4.menu.pnum.GENERIC_L4R5ZGYX.upload.maximum_size=1048576
4776+
GenL4.menu.pnum.GENERIC_L4R5ZGYX.upload.maximum_data_size=655360
4777+
GenL4.menu.pnum.GENERIC_L4R5ZGYX.build.board=GENERIC_L4R5ZGYX
4778+
GenL4.menu.pnum.GENERIC_L4R5ZGYX.build.product_line=STM32L4R5xx
4779+
GenL4.menu.pnum.GENERIC_L4R5ZGYX.build.variant=STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY
4780+
47734781
# Generic L4R5ZITx
47744782
GenL4.menu.pnum.GENERIC_L4R5ZITX=Generic L4R5ZITx
47754783
GenL4.menu.pnum.GENERIC_L4R5ZITX.upload.maximum_size=2097152
@@ -4778,6 +4786,14 @@ GenL4.menu.pnum.GENERIC_L4R5ZITX.build.board=GENERIC_L4R5ZITX
47784786
GenL4.menu.pnum.GENERIC_L4R5ZITX.build.product_line=STM32L4R5xx
47794787
GenL4.menu.pnum.GENERIC_L4R5ZITX.build.variant=STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT
47804788

4789+
# Generic L4R5ZIYx
4790+
GenL4.menu.pnum.GENERIC_L4R5ZIYX=Generic L4R5ZIYx
4791+
GenL4.menu.pnum.GENERIC_L4R5ZIYX.upload.maximum_size=2097152
4792+
GenL4.menu.pnum.GENERIC_L4R5ZIYX.upload.maximum_data_size=655360
4793+
GenL4.menu.pnum.GENERIC_L4R5ZIYX.build.board=GENERIC_L4R5ZIYX
4794+
GenL4.menu.pnum.GENERIC_L4R5ZIYX.build.product_line=STM32L4R5xx
4795+
GenL4.menu.pnum.GENERIC_L4R5ZIYX.build.variant=STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY
4796+
47814797
# Generic L4R5ZITxP
47824798
GenL4.menu.pnum.GENERIC_L4R5ZITXP=Generic L4R5ZITxP
47834799
GenL4.menu.pnum.GENERIC_L4R5ZITXP.upload.maximum_size=2097152
@@ -4810,6 +4826,14 @@ GenL4.menu.pnum.GENERIC_L4R9ZGJX.build.board=GENERIC_L4R9ZGJX
48104826
GenL4.menu.pnum.GENERIC_L4R9ZGJX.build.product_line=STM32L4R9xx
48114827
GenL4.menu.pnum.GENERIC_L4R9ZGJX.build.variant=STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ
48124828

4829+
# Generic L4R9ZGYx
4830+
GenL4.menu.pnum.GENERIC_L4R9ZGYX=Generic L4R9ZGYx
4831+
GenL4.menu.pnum.GENERIC_L4R9ZGYX.upload.maximum_size=1048576
4832+
GenL4.menu.pnum.GENERIC_L4R9ZGYX.upload.maximum_data_size=655360
4833+
GenL4.menu.pnum.GENERIC_L4R9ZGYX.build.board=GENERIC_L4R9ZGYX
4834+
GenL4.menu.pnum.GENERIC_L4R9ZGYX.build.product_line=STM32L4R9xx
4835+
GenL4.menu.pnum.GENERIC_L4R9ZGYX.build.variant=STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY
4836+
48134837
# Generic L4R9ZIJx
48144838
GenL4.menu.pnum.GENERIC_L4R9ZIJX=Generic L4R9ZIJx
48154839
GenL4.menu.pnum.GENERIC_L4R9ZIJX.upload.maximum_size=2097152
@@ -4818,6 +4842,14 @@ GenL4.menu.pnum.GENERIC_L4R9ZIJX.build.board=GENERIC_L4R9ZIJX
48184842
GenL4.menu.pnum.GENERIC_L4R9ZIJX.build.product_line=STM32L4R9xx
48194843
GenL4.menu.pnum.GENERIC_L4R9ZIJX.build.variant=STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ
48204844

4845+
# Generic L4R9ZIYx
4846+
GenL4.menu.pnum.GENERIC_L4R9ZIYX=Generic L4R9ZIYx
4847+
GenL4.menu.pnum.GENERIC_L4R9ZIYX.upload.maximum_size=2097152
4848+
GenL4.menu.pnum.GENERIC_L4R9ZIYX.upload.maximum_data_size=655360
4849+
GenL4.menu.pnum.GENERIC_L4R9ZIYX.build.board=GENERIC_L4R9ZIYX
4850+
GenL4.menu.pnum.GENERIC_L4R9ZIYX.build.product_line=STM32L4R9xx
4851+
GenL4.menu.pnum.GENERIC_L4R9ZIYX.build.variant=STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY
4852+
48214853
# Generic L4S5VITx
48224854
GenL4.menu.pnum.GENERIC_L4S5VITX=Generic L4S5VITx
48234855
GenL4.menu.pnum.GENERIC_L4S5VITX.upload.maximum_size=2097152
@@ -4834,6 +4866,14 @@ GenL4.menu.pnum.GENERIC_L4S5ZITX.build.board=GENERIC_L4S5ZITX
48344866
GenL4.menu.pnum.GENERIC_L4S5ZITX.build.product_line=STM32L4S5xx
48354867
GenL4.menu.pnum.GENERIC_L4S5ZITX.build.variant=STM32L4xx/L4R5Z(G-I)T_L4R7ZIT_L4S5ZIT_L4S7ZIT
48364868

4869+
# Generic L4S5ZIYx
4870+
GenL4.menu.pnum.GENERIC_L4S5ZIYX=Generic L4S5ZIYx
4871+
GenL4.menu.pnum.GENERIC_L4S5ZIYX.upload.maximum_size=2097152
4872+
GenL4.menu.pnum.GENERIC_L4S5ZIYX.upload.maximum_data_size=655360
4873+
GenL4.menu.pnum.GENERIC_L4S5ZIYX.build.board=GENERIC_L4S5ZIYX
4874+
GenL4.menu.pnum.GENERIC_L4S5ZIYX.build.product_line=STM32L4S5xx
4875+
GenL4.menu.pnum.GENERIC_L4S5ZIYX.build.variant=STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY
4876+
48374877
# Generic L4S7VITx
48384878
GenL4.menu.pnum.GENERIC_L4S7VITX=Generic L4S7VITx
48394879
GenL4.menu.pnum.GENERIC_L4S7VITX.upload.maximum_size=2097152
@@ -4858,6 +4898,14 @@ GenL4.menu.pnum.GENERIC_L4S9ZIJX.build.board=GENERIC_L4S9ZIJX
48584898
GenL4.menu.pnum.GENERIC_L4S9ZIJX.build.product_line=STM32L4S9xx
48594899
GenL4.menu.pnum.GENERIC_L4S9ZIJX.build.variant=STM32L4xx/L4R9Z(G-I)J_L4S9ZIJ
48604900

4901+
# Generic L4S9ZIYx
4902+
GenL4.menu.pnum.GENERIC_L4S9ZIYX=Generic L4S9ZIYx
4903+
GenL4.menu.pnum.GENERIC_L4S9ZIYX.upload.maximum_size=2097152
4904+
GenL4.menu.pnum.GENERIC_L4S9ZIYX.upload.maximum_data_size=655360
4905+
GenL4.menu.pnum.GENERIC_L4S9ZIYX.build.board=GENERIC_L4S9ZIYX
4906+
GenL4.menu.pnum.GENERIC_L4S9ZIYX.build.product_line=STM32L4S9xx
4907+
GenL4.menu.pnum.GENERIC_L4S9ZIYX.build.variant=STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY
4908+
48614909
# Upload menu
48624910
GenL4.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
48634911
GenL4.menu.upload_method.swdMethod.upload.protocol=0

‎variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/generic_clock.c‎

Lines changed: 48 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,8 +22,54 @@
2222
*/
2323
WEAK void SystemClock_Config(void)
2424
{
25-
/* SystemClock_Config can be generated by STM32CubeMX */
26-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
25+
RCC_OscInitTypeDef RCC_OscInitStruct = {};
26+
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
27+
RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
28+
29+
/** Configure the main internal regulator output voltage
30+
*/
31+
if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) {
32+
Error_Handler();
33+
}
34+
/** Initializes the RCC Oscillators according to the specified parameters
35+
* in the RCC_OscInitTypeDef structure.
36+
*/
37+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_MSI;
38+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
39+
RCC_OscInitStruct.MSIState = RCC_MSI_ON;
40+
RCC_OscInitStruct.MSICalibrationValue = 0;
41+
RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
42+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
43+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
44+
RCC_OscInitStruct.PLL.PLLM = 1;
45+
RCC_OscInitStruct.PLL.PLLN = 60;
46+
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV5;
47+
RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
48+
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
49+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
50+
Error_Handler();
51+
}
52+
/** Initializes the CPU, AHB and APB buses clocks
53+
*/
54+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
55+
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
56+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
57+
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
58+
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
59+
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
60+
61+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
62+
Error_Handler();
63+
}
64+
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SDMMC1
65+
| RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_OSPI;
66+
PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_SYSCLK;
67+
PeriphClkInit.OspiClockSelection = RCC_OSPICLKSOURCE_SYSCLK;
68+
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
69+
PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLP;
70+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
71+
Error_Handler();
72+
}
2773
}
2874

2975
#endif /* ARDUINO_GENERIC_* */

‎variants/STM32L4xx/L4R5Z(G-I)Y_L4R9Z(G-I)Y_L4S5ZIY_L4S9ZIY/ldscript.ld‎

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@@ -0,0 +1,177 @@
1+
/**
2+
******************************************************************************
3+
* @file LinkerScript.ld
4+
* @author Auto-generated by STM32CubeIDE
5+
* @brief Linker script for STM32L4R5ZIYx Device from STM32L4PLUS series
6+
* 2048Kbytes FLASH
7+
* 640Kbytes RAM
8+
*
9+
* Set heap size, stack size and stack location according
10+
* to application requirements.
11+
*
12+
* Set memory bank area and size if external memory is used
13+
******************************************************************************
14+
* @attention
15+
*
16+
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
17+
* All rights reserved.</center></h2>
18+
*
19+
* This software component is licensed by ST under BSD 3-Clause license,
20+
* the "License"; You may not use this file except in compliance with the
21+
* License. You may obtain a copy of the License at:
22+
* opensource.org/licenses/BSD-3-Clause
23+
*
24+
******************************************************************************
25+
*/
26+
27+
/* Entry Point */
28+
ENTRY(Reset_Handler)
29+
30+
/* Highest address of the user mode stack */
31+
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
32+
33+
_Min_Heap_Size = 0x200; /* required amount of heap */
34+
_Min_Stack_Size = 0x400; /* required amount of stack */
35+
36+
/* Memories definition */
37+
MEMORY
38+
{
39+
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
40+
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
41+
}
42+
43+
/* Sections */
44+
SECTIONS
45+
{
46+
/* The startup code into "FLASH" Rom type memory */
47+
.isr_vector :
48+
{
49+
. = ALIGN(4);
50+
KEEP(*(.isr_vector)) /* Startup code */
51+
. = ALIGN(4);
52+
} >FLASH
53+
54+
/* The program code and other data into "FLASH" Rom type memory */
55+
.text :
56+
{
57+
. = ALIGN(4);
58+
*(.text) /* .text sections (code) */
59+
*(.text*) /* .text* sections (code) */
60+
*(.glue_7) /* glue arm to thumb code */
61+
*(.glue_7t) /* glue thumb to arm code */
62+
*(.eh_frame)
63+
64+
KEEP (*(.init))
65+
KEEP (*(.fini))
66+
67+
. = ALIGN(4);
68+
_etext = .; /* define a global symbols at end of code */
69+
} >FLASH
70+
71+
/* Constant data into "FLASH" Rom type memory */
72+
.rodata :
73+
{
74+
. = ALIGN(4);
75+
*(.rodata) /* .rodata sections (constants, strings, etc.) */
76+
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
77+
. = ALIGN(4);
78+
} >FLASH
79+
80+
.ARM.extab : {
81+
. = ALIGN(4);
82+
*(.ARM.extab* .gnu.linkonce.armextab.*)
83+
. = ALIGN(4);
84+
} >FLASH
85+
86+
.ARM : {
87+
. = ALIGN(4);
88+
__exidx_start = .;
89+
*(.ARM.exidx*)
90+
__exidx_end = .;
91+
. = ALIGN(4);
92+
} >FLASH
93+
94+
.preinit_array :
95+
{
96+
. = ALIGN(4);
97+
PROVIDE_HIDDEN (__preinit_array_start = .);
98+
KEEP (*(.preinit_array*))
99+
PROVIDE_HIDDEN (__preinit_array_end = .);
100+
. = ALIGN(4);
101+
} >FLASH
102+
103+
.init_array :
104+
{
105+
. = ALIGN(4);
106+
PROVIDE_HIDDEN (__init_array_start = .);
107+
KEEP (*(SORT(.init_array.*)))
108+
KEEP (*(.init_array*))
109+
PROVIDE_HIDDEN (__init_array_end = .);
110+
. = ALIGN(4);
111+
} >FLASH
112+
113+
.fini_array :
114+
{
115+
. = ALIGN(4);
116+
PROVIDE_HIDDEN (__fini_array_start = .);
117+
KEEP (*(SORT(.fini_array.*)))
118+
KEEP (*(.fini_array*))
119+
PROVIDE_HIDDEN (__fini_array_end = .);
120+
. = ALIGN(4);
121+
} >FLASH
122+
123+
/* Used by the startup to initialize data */
124+
_sidata = LOADADDR(.data);
125+
126+
/* Initialized data sections into "RAM" Ram type memory */
127+
.data :
128+
{
129+
. = ALIGN(4);
130+
_sdata = .; /* create a global symbol at data start */
131+
*(.data) /* .data sections */
132+
*(.data*) /* .data* sections */
133+
*(.RamFunc) /* .RamFunc sections */
134+
*(.RamFunc*) /* .RamFunc* sections */
135+
136+
. = ALIGN(4);
137+
_edata = .; /* define a global symbol at data end */
138+
139+
} >RAM AT> FLASH
140+
141+
/* Uninitialized data section into "RAM" Ram type memory */
142+
. = ALIGN(4);
143+
.bss :
144+
{
145+
/* This is used by the startup in order to initialize the .bss section */
146+
_sbss = .; /* define a global symbol at bss start */
147+
__bss_start__ = _sbss;
148+
*(.bss)
149+
*(.bss*)
150+
*(COMMON)
151+
152+
. = ALIGN(4);
153+
_ebss = .; /* define a global symbol at bss end */
154+
__bss_end__ = _ebss;
155+
} >RAM
156+
157+
/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
158+
._user_heap_stack :
159+
{
160+
. = ALIGN(8);
161+
PROVIDE ( end = . );
162+
PROVIDE ( _end = . );
163+
. = . + _Min_Heap_Size;
164+
. = . + _Min_Stack_Size;
165+
. = ALIGN(8);
166+
} >RAM
167+
168+
/* Remove information from the compiler libraries */
169+
/DISCARD/ :
170+
{
171+
libc.a ( * )
172+
libm.a ( * )
173+
libgcc.a ( * )
174+
}
175+
176+
.ARM.attributes 0 : { *(.ARM.attributes) }
177+
}

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