Merge pull request #1488 from fpistm/SPI

library: spi: enhancement

Author: fpistm

libraries/SPI/src/utility/spi_com.c

@@ -288,6 +288,9 @@ void spi_init(spi_t *obj, uint32_t speed, spi_mode_e mode, uint8_t msb)
     defined(STM32WBxx) || defined(STM32MP1xx)
   handle->Init.NSSPMode          = SPI_NSS_PULSE_DISABLE;
 #endif
+#ifdef SPI_MASTER_KEEP_IO_STATE_ENABLE
+  handle->Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE;  /* Recommanded setting to avoid glitches */
+#endif
 
   /* Configure SPI GPIO pins */
   pinmap_pinout(obj->pin_mosi, PinMap_SPI_MOSI);
@@ -305,36 +308,48 @@ void spi_init(spi_t *obj, uint32_t speed, spi_mode_e mode, uint8_t msb)
   // Enable SPI clock
   if (handle->Instance == SPI1) {
     __HAL_RCC_SPI1_CLK_ENABLE();
+    __HAL_RCC_SPI1_FORCE_RESET();
+    __HAL_RCC_SPI1_RELEASE_RESET();
   }
 #endif
 
 #if defined SPI2_BASE
   if (handle->Instance == SPI2) {
     __HAL_RCC_SPI2_CLK_ENABLE();
+    __HAL_RCC_SPI2_FORCE_RESET();
+    __HAL_RCC_SPI2_RELEASE_RESET();
   }
 #endif
 
 #if defined SPI3_BASE
   if (handle->Instance == SPI3) {
     __HAL_RCC_SPI3_CLK_ENABLE();
+    __HAL_RCC_SPI3_FORCE_RESET();
+    __HAL_RCC_SPI3_RELEASE_RESET();
   }
 #endif
 
 #if defined SPI4_BASE
   if (handle->Instance == SPI4) {
     __HAL_RCC_SPI4_CLK_ENABLE();
+    __HAL_RCC_SPI4_FORCE_RESET();
+    __HAL_RCC_SPI4_RELEASE_RESET();
   }
 #endif
 
 #if defined SPI5_BASE
   if (handle->Instance == SPI5) {
     __HAL_RCC_SPI5_CLK_ENABLE();
+    __HAL_RCC_SPI5_FORCE_RESET();
+    __HAL_RCC_SPI5_RELEASE_RESET();
   }
 #endif
 
 #if defined SPI6_BASE
   if (handle->Instance == SPI6) {
     __HAL_RCC_SPI6_CLK_ENABLE();
+    __HAL_RCC_SPI6_FORCE_RESET();
+    __HAL_RCC_SPI6_RELEASE_RESET();
   }
 #endif