Skip to content

Commit 1d55525

Browse files
fpistmfpistm
committed
[G4] Update STM32G4xx HAL Drivers to v1.2.0
Included in STM32CubeG4 FW v1.3.0 Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parent b9f2434 commit 1d55525

File tree

105 files changed

+5635
-3492
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

105 files changed

+5635
-3492
lines changed

‎system/Drivers/STM32G4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -643,6 +643,10 @@
643643
#define HAL_HRTIM_ExternalEventCounterEnable HAL_HRTIM_ExtEventCounterEnable
644644
#define HAL_HRTIM_ExternalEventCounterDisable HAL_HRTIM_ExtEventCounterDisable
645645
#define HAL_HRTIM_ExternalEventCounterReset HAL_HRTIM_ExtEventCounterReset
646+
#define HRTIM_TIMEEVENT_A HRTIM_EVENTCOUNTER_A
647+
#define HRTIM_TIMEEVENT_B HRTIM_EVENTCOUNTER_B
648+
#define HRTIM_TIMEEVENTRESETMODE_UNCONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_UNCONDITIONAL
649+
#define HRTIM_TIMEEVENTRESETMODE_CONDITIONAL HRTIM_EVENTCOUNTER_RSTMODE_CONDITIONAL
646650
#endif /* STM32G4 */
647651

648652
#if defined(STM32H7)
@@ -1531,18 +1535,18 @@
15311535

15321536
#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
15331537

1534-
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)
1538+
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) || defined(STM32L1)
15351539
#define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT
15361540
#define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT
15371541
#define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT
15381542
#define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT
1539-
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */
1540-
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)
1543+
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
1544+
#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4)|| defined(STM32L1)
15411545
#define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA
15421546
#define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA
15431547
#define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA
15441548
#define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA
1545-
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */
1549+
#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 || STM32L1 */
15461550

15471551
#if defined(STM32F4)
15481552
#define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT

‎system/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -461,7 +461,7 @@ extern "C" {
461461
((__CONFIG__) == SYSCFG_BREAK_SRAMPARITY) || \
462462
((__CONFIG__) == SYSCFG_BREAK_LOCKUP))
463463

464-
#if (CCMSRAM_SIZE == 0x00008000UL)
464+
#if (CCMSRAM_SIZE == 0x00008000UL) || (CCMSRAM_SIZE == 0x00004000UL)
465465
#define IS_SYSCFG_CCMSRAMWRP_PAGE(__PAGE__) ((__PAGE__) > 0U)
466466
#elif (CCMSRAM_SIZE == 0x00002800UL)
467467
#define IS_SYSCFG_CCMSRAMWRP_PAGE(__PAGE__) (((__PAGE__) > 0U) && ((__PAGE__) <= 0x000003FFU))

‎system/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc.h‎

Lines changed: 93 additions & 60 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_adc_ex.h‎

Lines changed: 114 additions & 42 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_comp.h‎

Lines changed: 36 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1004,7 +1004,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
10041004
:((__INSTANCE__) == COMP5) ? COMP_EXTI_LINE_COMP5 \
10051005
:((__INSTANCE__) == COMP6) ? COMP_EXTI_LINE_COMP6 \
10061006
: COMP_EXTI_LINE_COMP7)
1007-
#elif defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) || defined(STM32G471xx)
1007+
#elif defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) || defined(STM32G471xx) || defined(STM32G491xx) || defined(STM32G4A1xx)
10081008
#define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 \
10091009
:((__INSTANCE__) == COMP2) ? COMP_EXTI_LINE_COMP2 \
10101010
:((__INSTANCE__) == COMP3) ? COMP_EXTI_LINE_COMP3 \
@@ -1014,7 +1014,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
10141014
* @}
10151015
*/
10161016

1017-
/** @defgroup COMP_IS_COMP_Definitions COMP private macros to check input parameters
1017+
/** @defgroup COMP_IS_COMP_Private_Definitions COMP private macros to check input parameters
10181018
* @{
10191019
*/
10201020
#define IS_COMP_INPUT_PLUS(__COMP_INSTANCE__, __INPUT_PLUS__) (((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO1) || \
@@ -1055,7 +1055,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
10551055
(((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC2_CH1) || \
10561056
((__INPUT_MINUS__) == COMP_INPUT_MINUS_DAC4_CH1)) \
10571057
))
1058-
#elif defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) || defined(STM32G471xx)
1058+
#elif defined(STM32GBK1CB) || defined(STM32G431xx) || defined(STM32G441xx) || defined(STM32G471xx) || defined(STM32G491xx) || defined(STM32G4A1xx)
10591059
#define IS_COMP_INPUT_MINUS(__COMP_INSTANCE__, __INPUT_MINUS__) (((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_4VREFINT) || \
10601060
((__INPUT_MINUS__) == COMP_INPUT_MINUS_1_2VREFINT) || \
10611061
((__INPUT_MINUS__) == COMP_INPUT_MINUS_3_4VREFINT) || \
@@ -1219,6 +1219,39 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
12191219
|| ((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM15_OC1) \
12201220
|| ((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM4_OC3) \
12211221
)
1222+
#elif defined(STM32G491xx) || defined(STM32G4A1xx)
1223+
#define IS_COMP_BLANKINGSRC_INSTANCE(__INSTANCE__, __OUTPUT_BLANKING_SOURCE__) \
1224+
((((__INSTANCE__) == COMP1) && \
1225+
(((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_NONE) || \
1226+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM1_OC5_COMP1) || \
1227+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM2_OC3_COMP1) || \
1228+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM3_OC3_COMP1) || \
1229+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM8_OC5_COMP1))) \
1230+
|| \
1231+
(((__INSTANCE__) == COMP2) && \
1232+
(((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_NONE) || \
1233+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM1_OC5_COMP2) || \
1234+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM2_OC3_COMP2) || \
1235+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM3_OC3_COMP2) || \
1236+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM8_OC5_COMP2))) \
1237+
|| \
1238+
(((__INSTANCE__) == COMP3) && \
1239+
(((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_NONE) || \
1240+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM1_OC5_COMP3) || \
1241+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM2_OC4_COMP3) || \
1242+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM3_OC3_COMP3) || \
1243+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM8_OC5_COMP3))) \
1244+
|| \
1245+
(((__INSTANCE__) == COMP4) && \
1246+
(((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_NONE) || \
1247+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM1_OC5_COMP4) || \
1248+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM3_OC4_COMP4) || \
1249+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM8_OC5_COMP4) || \
1250+
((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM15_OC1_COMP4))) \
1251+
|| ((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM20_OC5) \
1252+
|| ((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM15_OC1) \
1253+
|| ((__OUTPUT_BLANKING_SOURCE__) == COMP_BLANKINGSRC_TIM4_OC3) \
1254+
)
12221255
#endif
12231256

12241257
#define IS_COMP_TRIGGERMODE(__MODE__) (((__MODE__) == COMP_TRIGGERMODE_NONE) || \

‎system/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_cordic.h‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
******************************************************************************
88
* @attention
99
*
10-
* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10+
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
1111
* All rights reserved.</center></h2>
1212
*
1313
* This software component is licensed by ST under BSD 3-Clause license,
@@ -29,6 +29,7 @@ extern "C" {
2929
/* Includes ------------------------------------------------------------------*/
3030
#include "stm32g4xx_hal_def.h"
3131

32+
#if defined(CORDIC)
3233
/** @addtogroup STM32G4xx_HAL_Driver
3334
* @{
3435
*/
@@ -267,7 +268,7 @@ typedef void (*pCORDIC_CallbackTypeDef)(CORDIC_HandleTypeDef *hcordic); /*!< p
267268
* @{
268269
*/
269270
#define CORDIC_NBREAD_1 (0x00000000U) /*!< One 32-bits read containing either only one
270-
32-bit data ouput (Q1.31 format), or two 16-bit
271+
32-bit data output (Q1.31 format), or two 16-bit
271272
data output (Q1.15 format) packed in one 32 bits Data */
272273
#define CORDIC_NBREAD_2 CORDIC_CSR_NRES /*!< Two 32-bit Data containing two 32-bits data output
273274
(Q1.31 format) */
@@ -587,6 +588,8 @@ uint32_t HAL_CORDIC_GetError(CORDIC_HandleTypeDef *hcordic);
587588
* @}
588589
*/
589590

591+
#endif /* CORDIC */
592+
590593
#ifdef __cplusplus
591594
}
592595
#endif

0 commit comments

Comments
 (0)