@@ -64,7 +64,7 @@ typedef enum
6464typedef struct __DAC_HandleTypeDef
6565#else
6666typedef struct
67- #endif
67+ #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
6868{
6969 DAC_TypeDef * Instance ; /*!< Register base address */
7070
@@ -83,18 +83,19 @@ typedef struct
8383 void (* ConvHalfCpltCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
8484 void (* ErrorCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
8585 void (* DMAUnderrunCallbackCh1 ) (struct __DAC_HandleTypeDef * hdac );
86+
8687 void (* ConvCpltCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
8788 void (* ConvHalfCpltCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
8889 void (* ErrorCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
8990 void (* DMAUnderrunCallbackCh2 ) (struct __DAC_HandleTypeDef * hdac );
9091
92+
9193 void (* MspInitCallback ) (struct __DAC_HandleTypeDef * hdac );
92- void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef * hdac );
94+ void (* MspDeInitCallback ) (struct __DAC_HandleTypeDef * hdac );
9395#endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
9496
9597} DAC_HandleTypeDef ;
9698
97-
9899/**
99100 * @brief DAC Configuration regular Channel structure definition
100101 */
@@ -118,10 +119,12 @@ typedef enum
118119 HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U , /*!< DAC CH1 half Complete Callback ID */
119120 HAL_DAC_CH1_ERROR_ID = 0x02U , /*!< DAC CH1 error Callback ID */
120121 HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U , /*!< DAC CH1 underrun Callback ID */
122+
121123 HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U , /*!< DAC CH2 Complete Callback ID */
122124 HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U , /*!< DAC CH2 half Complete Callback ID */
123125 HAL_DAC_CH2_ERROR_ID = 0x06U , /*!< DAC CH2 error Callback ID */
124126 HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U , /*!< DAC CH2 underrun Callback ID */
127+
125128 HAL_DAC_MSPINIT_CB_ID = 0x08U , /*!< DAC MspInit Callback ID */
126129 HAL_DAC_MSPDEINIT_CB_ID = 0x09U , /*!< DAC MspDeInit Callback ID */
127130 HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */
@@ -162,13 +165,13 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
162165/** @defgroup DAC_trigger_selection DAC trigger selection
163166 * @{
164167 */
165- #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
168+ #define DAC_TRIGGER_NONE 0x00000000UL /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */
166169#define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
167170#define DAC_TRIGGER_T4_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
168171#define DAC_TRIGGER_T5_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */
169172#define DAC_TRIGGER_T6_TRGO ( DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
170173#define DAC_TRIGGER_T7_TRGO ( DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
171- #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
174+ #define DAC_TRIGGER_T8_TRGO ( DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
172175#define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
173176#define DAC_TRIGGER_SOFTWARE (DAC_CR_TSEL1 | DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */
174177
@@ -190,7 +193,9 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
190193 * @{
191194 */
192195#define DAC_CHANNEL_1 0x00000000U
196+
193197#define DAC_CHANNEL_2 0x00000010U
198+
194199/**
195200 * @}
196201 */
@@ -210,8 +215,10 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
210215 * @{
211216 */
212217#define DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1)
218+
213219#define DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2)
214220
221+
215222/**
216223 * @}
217224 */
@@ -220,8 +227,10 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
220227 * @{
221228 */
222229#define DAC_IT_DMAUDR1 (DAC_SR_DMAUDR1)
230+
223231#define DAC_IT_DMAUDR2 (DAC_SR_DMAUDR2)
224232
233+
225234/**
226235 * @}
227236 */
@@ -270,26 +279,28 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
270279 * @param __ALIGNMENT__ specifies the DAC alignment
271280 * @retval None
272281 */
273- #define DAC_DHR12R1_ALIGNMENT (__ALIGNMENT__ ) (0x00000008U + (__ALIGNMENT__))
282+ #define DAC_DHR12R1_ALIGNMENT (__ALIGNMENT__ ) (0x00000008UL + (__ALIGNMENT__))
283+
274284
275285/** @brief Set DHR12R2 alignment.
276286 * @param __ALIGNMENT__ specifies the DAC alignment
277287 * @retval None
278288 */
279- #define DAC_DHR12R2_ALIGNMENT (__ALIGNMENT__ ) (0x00000014U + (__ALIGNMENT__))
289+ #define DAC_DHR12R2_ALIGNMENT (__ALIGNMENT__ ) (0x00000014UL + (__ALIGNMENT__))
290+
280291
281292/** @brief Set DHR12RD alignment.
282293 * @param __ALIGNMENT__ specifies the DAC alignment
283294 * @retval None
284295 */
285- #define DAC_DHR12RD_ALIGNMENT (__ALIGNMENT__ ) (0x00000020U + (__ALIGNMENT__))
296+ #define DAC_DHR12RD_ALIGNMENT (__ALIGNMENT__ ) (0x00000020UL + (__ALIGNMENT__))
286297
287298/** @brief Enable the DAC interrupt.
288299 * @param __HANDLE__ specifies the DAC handle
289300 * @param __INTERRUPT__ specifies the DAC interrupt.
290301 * This parameter can be any combination of the following values:
291- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
292- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
302+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
303+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
293304 * @retval None
294305 */
295306#define __HAL_DAC_ENABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
@@ -298,8 +309,8 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
298309 * @param __HANDLE__ specifies the DAC handle
299310 * @param __INTERRUPT__ specifies the DAC interrupt.
300311 * This parameter can be any combination of the following values:
301- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
302- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
312+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
313+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
303314 * @retval None
304315 */
305316#define __HAL_DAC_DISABLE_IT (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
@@ -308,18 +319,19 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
308319 * @param __HANDLE__ DAC handle
309320 * @param __INTERRUPT__ DAC interrupt source to check
310321 * This parameter can be any combination of the following values:
311- * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
312- * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
322+ * @arg DAC_IT_DMAUDR1 DAC channel 1 DMA underrun interrupt
323+ * @arg DAC_IT_DMAUDR2 DAC channel 2 DMA underrun interrupt
313324 * @retval State of interruption (SET or RESET)
314325 */
315- #define __HAL_DAC_GET_IT_SOURCE (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
326+ #define __HAL_DAC_GET_IT_SOURCE (__HANDLE__ , __INTERRUPT__ ) (((__HANDLE__)->Instance->CR\
327+ & (__INTERRUPT__)) == (__INTERRUPT__))
316328
317329/** @brief Get the selected DAC's flag status.
318330 * @param __HANDLE__ specifies the DAC handle.
319331 * @param __FLAG__ specifies the DAC flag to get.
320332 * This parameter can be any combination of the following values:
321- * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
322- * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
333+ * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
334+ * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
323335 * @retval None
324336 */
325337#define __HAL_DAC_GET_FLAG (__HANDLE__ , __FLAG__ ) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
@@ -328,8 +340,8 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
328340 * @param __HANDLE__ specifies the DAC handle.
329341 * @param __FLAG__ specifies the DAC flag to clear.
330342 * This parameter can be any combination of the following values:
331- * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
332- * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
343+ * @arg DAC_FLAG_DMAUDR1 DAC channel 1 DMA underrun flag
344+ * @arg DAC_FLAG_DMAUDR2 DAC channel 2 DMA underrun flag
333345 * @retval None
334346 */
335347#define __HAL_DAC_CLEAR_FLAG (__HANDLE__ , __FLAG__ ) (((__HANDLE__)->Instance->SR) = (__FLAG__))
@@ -353,7 +365,7 @@ typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
353365 ((ALIGN) == DAC_ALIGN_12B_L) || \
354366 ((ALIGN) == DAC_ALIGN_8B_R))
355367
356- #define IS_DAC_DATA (DATA ) ((DATA) <= 0xFFF0U )
368+ #define IS_DAC_DATA (DATA ) ((DATA) <= 0xFFF0UL )
357369
358370/**
359371 * @}
@@ -390,9 +402,7 @@ HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
390402HAL_StatusTypeDef HAL_DAC_Start_DMA (DAC_HandleTypeDef * hdac , uint32_t Channel , uint32_t * pData , uint32_t Length ,
391403 uint32_t Alignment );
392404HAL_StatusTypeDef HAL_DAC_Stop_DMA (DAC_HandleTypeDef * hdac , uint32_t Channel );
393-
394405void HAL_DAC_IRQHandler (DAC_HandleTypeDef * hdac );
395-
396406HAL_StatusTypeDef HAL_DAC_SetValue (DAC_HandleTypeDef * hdac , uint32_t Channel , uint32_t Alignment , uint32_t Data );
397407
398408void HAL_DAC_ConvCpltCallbackCh1 (DAC_HandleTypeDef * hdac );
@@ -416,7 +426,6 @@ HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DA
416426 */
417427/* Peripheral Control functions ***********************************************/
418428uint32_t HAL_DAC_GetValue (DAC_HandleTypeDef * hdac , uint32_t Channel );
419-
420429HAL_StatusTypeDef HAL_DAC_ConfigChannel (DAC_HandleTypeDef * hdac , DAC_ChannelConfTypeDef * sConfig , uint32_t Channel );
421430/**
422431 * @}
@@ -462,7 +471,6 @@ void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
462471#endif
463472
464473
465- #endif /*STM32F2xx_HAL_DAC_H */
474+ #endif /* STM32F2xx_HAL_DAC_H */
466475
467476/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
468-
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