From b748917a3f4e9b46b84585527b8495f5c172b0bc Mon Sep 17 00:00:00 2001 From: Matt Carpenter Date: Mon, 4 Jul 2022 07:40:40 -0400 Subject: [PATCH 1/9] add support for stm32l4r5 and stm32l4s5 --- .github/workflows/ci.yml | 3 ++- Cargo.toml | 8 ++++---- src/adc.rs | 8 ++++---- src/dma.rs | 8 ++++---- src/dmamux.rs | 32 ++++++++++++++++---------------- src/gpio.rs | 16 ++++++++-------- src/i2c.rs | 12 ++++++------ src/lib.rs | 5 +++-- src/rcc/enable.rs | 24 ++++++++++++------------ src/serial.rs | 20 ++++++++++---------- src/spi.rs | 12 ++++++------ src/timer.rs | 16 ++++++++-------- src/watchdog.rs | 6 ++++++ 13 files changed, 89 insertions(+), 81 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 84357e1e..e35a2036 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -50,13 +50,14 @@ jobs: command: test args: --lib --target x86_64-unknown-linux-gnu --features rt,unproven,${{ matrix.mcu.id }}${{ matrix.mcu.additional-features }} - ci-r9: + ci-rx: runs-on: ubuntu-latest strategy: matrix: rust: - stable mcu: + - { id: stm32l4r5, additional-features: "" } - { id: stm32l4r9, additional-features: "" } - { id: stm32l4s9, additional-features: "" } diff --git a/Cargo.toml b/Cargo.toml index 692c72bf..ba526aea 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ edition = "2018" [dependencies] cortex-m = "0.7" nb = "0.1.1" -stm32l4 = "0.14.0" +stm32l4 = "0.15.0" embedded-dma = "0.1" bxcan = ">=0.4, <0.7" fugit = "0.3.5" @@ -98,11 +98,11 @@ stm32l486 = [ "stm32l4/stm32l4x6" ] stm32l496 = [ "stm32l4/stm32l4x6" ] stm32l4a6 = [ "stm32l4/stm32l4x6" ] -# L4+ series PAC support?? +# L4+ #stm32l4p5 = [ "stm32l4/stm32l4x5" ] #stm32l4q5 = [ "stm32l4/stm32l4x5" ] -#stm32l4r5 = [ "stm32l4/stm32l4x5" ] -#stm32l4s5 = [ "stm32l4/stm32l4x5" ] +stm32l4r5 = [ "stm32l4/stm32l4r5" ] +stm32l4s5 = [ "stm32l4/stm32l4r5" ] # L4x7 #stm32l4r7 = [ "stm32l4/stm32l4x7" ] diff --git a/src/adc.rs b/src/adc.rs index 27785f0b..6a8b6972 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -916,8 +916,8 @@ adc_pins!( feature = "stm32l443", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -930,8 +930,8 @@ adc!(ADC2 => (adc2, ADC_COMMON)); feature = "stm32l443", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", diff --git a/src/dma.rs b/src/dma.rs index b91fd21e..15edb2cb 100644 --- a/src/dma.rs +++ b/src/dma.rs @@ -694,8 +694,8 @@ macro_rules! dma { #[cfg(not(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -1126,8 +1126,8 @@ macro_rules! dma { #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", diff --git a/src/dmamux.rs b/src/dmamux.rs index 83bed1c2..d43ac053 100644 --- a/src/dmamux.rs +++ b/src/dmamux.rs @@ -11,8 +11,8 @@ use crate::dma::{dma1, dma2}; #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -132,8 +132,8 @@ pub enum DmaInput { #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -240,8 +240,8 @@ enum DMAREQ_ID_A { #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -256,8 +256,8 @@ impl From for u8 { #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -372,8 +372,8 @@ impl TryFrom for DMAREQ_ID_A { #[cfg(not(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -419,8 +419,8 @@ macro_rules! cselr { #[cfg(not(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -565,8 +565,8 @@ macro_rules! dmamux { #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -586,8 +586,8 @@ macro_rules! dmamux { #[cfg(not(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", diff --git a/src/gpio.rs b/src/gpio.rs index 94a8427c..53ebf28a 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -727,8 +727,8 @@ gpio!(GPIOE, gpioe, PEx, 'E', 4, [ feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -762,8 +762,8 @@ gpio!(GPIOF, gpiof, PFx, 'F', 5, [ feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -801,7 +801,7 @@ gpio!(GPIOG, gpiog, PGx, 'G', 6, // feature = "stm32l4p5", // feature = "stm32l4q5", // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -846,7 +846,7 @@ impl Gpio

{ // feature = "stm32l4p5", // feature = "stm32l4q5", // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -864,7 +864,7 @@ impl Gpio

{ // feature = "stm32l4p5", // feature = "stm32l4q5", // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -882,7 +882,7 @@ impl Gpio

{ // feature = "stm32l4p5", // feature = "stm32l4q5", // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", diff --git a/src/i2c.rs b/src/i2c.rs index 998ec765..03d525c2 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -12,8 +12,8 @@ use crate::hal::blocking::i2c::{Read, Write, WriteRead}; feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -208,8 +208,8 @@ hal!(I2C3, i2c3); feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -615,8 +615,8 @@ mod stm32l4x6_pins { #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", diff --git a/src/lib.rs b/src/lib.rs index e0788a66..adb93666 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -30,8 +30,8 @@ // note L4+ PAC support is mostly missing so other than r9/s9 these features don't actually exist yet // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", // these have PAC support. Hal integration is very slim though @@ -46,6 +46,7 @@ This crate requires one of the following features enabled: stm32l433, stm32l443 stm32l475, stm32l476, stm32l486, stm32l496, stm32l4a6 + stm32l4r5, stm32l4r9, stm32l4s9 " ); diff --git a/src/rcc/enable.rs b/src/rcc/enable.rs index 67b9ac9f..e354563c 100644 --- a/src/rcc/enable.rs +++ b/src/rcc/enable.rs @@ -143,8 +143,8 @@ bus! { #[cfg(not(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -164,8 +164,8 @@ bus! { #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -188,8 +188,8 @@ bus! { feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -257,8 +257,8 @@ bus! { feature = "stm32l443", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -323,8 +323,8 @@ bus! { feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -360,8 +360,8 @@ bus! { #[cfg(any( // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", diff --git a/src/serial.rs b/src/serial.rs index 0eb5d970..9f073893 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -35,8 +35,8 @@ use crate::time::{Bps, U32Ext}; feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -869,8 +869,8 @@ hal! { feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -890,8 +890,8 @@ hal! { feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -1077,8 +1077,8 @@ impl_pin_traits! { feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -1105,8 +1105,8 @@ impl_pin_traits! { feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", diff --git a/src/spi.rs b/src/spi.rs index dea33abe..5c2615fc 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -294,8 +294,8 @@ use crate::gpio::gpiod::*; feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -324,8 +324,8 @@ pins!(SPI1, 5, feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -357,8 +357,8 @@ pins!(SPI3, 6, feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", diff --git a/src/timer.rs b/src/timer.rs index 6e47acf7..744277b8 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -17,8 +17,8 @@ use crate::hal::timer::{Cancel, CountDown, Periodic}; feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", // feature = "stm32l4r9", @@ -45,8 +45,8 @@ use crate::stm32::{TIM15, TIM16, TIM2, TIM6}; feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", feature = "stm32l4r9", @@ -301,8 +301,8 @@ hal! { feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", // feature = "stm32l4r9", @@ -332,8 +332,8 @@ hal! { feature = "stm32l4a6", // feature = "stm32l4p5", // feature = "stm32l4q5", - // feature = "stm32l4r5", - // feature = "stm32l4s5", + feature = "stm32l4r5", + feature = "stm32l4s5", // feature = "stm32l4r7", // feature = "stm32l4s7", // feature = "stm32l4r9", diff --git a/src/watchdog.rs b/src/watchdog.rs index de60d9c9..3bce7a93 100644 --- a/src/watchdog.rs +++ b/src/watchdog.rs @@ -39,6 +39,9 @@ impl IndependentWatchdog { feature = "stm32l462", feature = "stm32l433", feature = "stm32l443", + feature = "stm32l4r5", + feature = "stm32l4s5", + feature = "stm32l4r9" ))] dbgmcu.apb1fzr1.modify(|_, w| w.dbg_iwdg_stop().bit(stop)); #[cfg(not(any( @@ -53,6 +56,9 @@ impl IndependentWatchdog { feature = "stm32l462", feature = "stm32l433", feature = "stm32l443", + feature = "stm32l4r5", + feature = "stm32l4s5", + feature = "stm32l4r9" )))] dbgmcu.apb1_fzr1.modify(|_, w| w.dbg_iwdg_stop().bit(stop)); } From 9a3785208216894851299509114a5fa02ec48a17 Mon Sep 17 00:00:00 2001 From: Matt Carpenter Date: Mon, 4 Jul 2022 08:31:57 -0400 Subject: [PATCH 2/9] add pac for stm32l4r5 --- src/lib.rs | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index adb93666..96c63647 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -27,7 +27,6 @@ feature = "stm32l486", feature = "stm32l496", feature = "stm32l4a6", - // note L4+ PAC support is mostly missing so other than r9/s9 these features don't actually exist yet // feature = "stm32l4p5", // feature = "stm32l4q5", feature = "stm32l4r5", @@ -46,7 +45,7 @@ This crate requires one of the following features enabled: stm32l433, stm32l443 stm32l475, stm32l476, stm32l486, stm32l496, stm32l4a6 - stm32l4r5, + stm32l4r5, stm32l4s5 stm32l4r9, stm32l4s9 " ); @@ -111,6 +110,12 @@ pub use stm32l4::stm32l4x5 as pac; ))] pub use stm32l4::stm32l4x6 as pac; +#[cfg(any( + feature = "stm32l4r5", + feature = "stm32l4s5" +))] +pub use stm32l4::stm32l4r5 as pac; + #[cfg(any(feature = "stm32l4r9", feature = "stm32l4s9",))] pub use stm32l4::stm32l4r9 as pac; From 6ac41bd19fdd78c496aa730295bc8d44324acb41 Mon Sep 17 00:00:00 2001 From: Matt Carpenter Date: Mon, 4 Jul 2022 09:23:16 -0400 Subject: [PATCH 3/9] fixes --- src/pwm.rs | 4 ++-- src/rcc/enable.rs | 15 ++++++++++--- src/rtc.rs | 54 +++++++++++++++++++++++++++++++++++++++++++++-- src/tsc.rs | 2 +- src/watchdog.rs | 16 ++++++++++++-- 5 files changed, 81 insertions(+), 10 deletions(-) diff --git a/src/pwm.rs b/src/pwm.rs index 2c371bb0..e96c5c26 100644 --- a/src/pwm.rs +++ b/src/pwm.rs @@ -370,7 +370,7 @@ macro_rules! pwm_channels { #[inline(always)] fn get_duty(&self) -> Self::Duty { - unsafe { (*$TIMX::ptr()).$ccrX.read().$ccr().bits() } + unsafe { (*$TIMX::ptr()).$ccrX().read().$ccr().bits() } } #[inline(always)] @@ -380,7 +380,7 @@ macro_rules! pwm_channels { #[inline(always)] fn set_duty(&mut self, duty: Self::Duty) { - unsafe { (*$TIMX::ptr()).$ccrX.write(|w| w.$ccr().bits(duty)) } + unsafe { (*$TIMX::ptr()).$ccrX().write(|w| w.$ccr().bits(duty)) } } } )+ diff --git a/src/rcc/enable.rs b/src/rcc/enable.rs index e354563c..990a46e3 100644 --- a/src/rcc/enable.rs +++ b/src/rcc/enable.rs @@ -172,7 +172,7 @@ bus! { feature = "stm32l4s9", ))] bus! { - ADC => (AHB2, adcen, adcfssmen, adcrst), // 13 + ADC1 => (AHB2, adcen, adcfssmen, adcrst), // 13 FIREWALL => (APB2, fwen,,), // 7 LTCD => (APB2, ltdcen, ltdcsmen, ltdcrst), // 26 @@ -235,8 +235,6 @@ bus! { feature = "stm32l431", feature = "stm32l451", feature = "stm32l471", - feature = "stm32l412", - feature = "stm32l422", feature = "stm32l432", feature = "stm32l442", feature = "stm32l452", @@ -245,12 +243,23 @@ bus! { feature = "stm32l443", feature = "stm32l475", ))] +bus! { + DAC => (APB1R1, dac1en, dac1smen, dac1rst), // 29 + + SDMMC => (APB2, sdmmcen, sdmmcsmen, sdmmcrst), // 10 +} + +#[cfg(any( + feature = "stm32l412", + feature = "stm32l422", +))] bus! { DAC1 => (APB1R1, dac1en, dac1smen, dac1rst), // 29 SDMMC => (APB2, sdmmcen, sdmmcsmen, sdmmcrst), // 10 } + // L4x1, L4x2, L4x5, or L4x6 #[cfg(not(any( feature = "stm32l433", diff --git a/src/rtc.rs b/src/rtc.rs index 944a0744..d06c6d38 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -271,7 +271,32 @@ impl Rtc { rtc_registers::clear_alarm_a_flag(rtc); while !rtc_registers::is_alarm_a_accessible(rtc) {} - rtc.alrmar.modify(|_, w| unsafe { + #[cfg(any( + feature = "stm32l431", + feature = "stm32l451", + feature = "stm32l471", + feature = "stm32l412", + feature = "stm32l422", + feature = "stm32l432", + feature = "stm32l442", + feature = "stm32l452", + feature = "stm32l462", + feature = "stm32l433", + feature = "stm32l443", + feature = "stm32l475", + feature = "stm32l476", + feature = "stm32l486", + feature = "stm32l496", + feature = "stm32l4a6", + ))] + let mut alrmar = rtc.alrmar(); + + #[cfg(any( + feature = "stm32l4r5" + ))] + let mut alrmar = rtc.alrmar; + + alrmar.modify(|_, w| unsafe { w.dt() .bits(dt) .du() @@ -307,7 +332,32 @@ impl Rtc { rtc_registers::clear_alarm_b_flag(rtc); while !rtc_registers::is_alarm_b_accessible(rtc) {} - rtc.alrmbr.modify(|_, w| unsafe { + #[cfg(any( + feature = "stm32l431", + feature = "stm32l451", + feature = "stm32l471", + feature = "stm32l412", + feature = "stm32l422", + feature = "stm32l432", + feature = "stm32l442", + feature = "stm32l452", + feature = "stm32l462", + feature = "stm32l433", + feature = "stm32l443", + feature = "stm32l475", + feature = "stm32l476", + feature = "stm32l486", + feature = "stm32l496", + feature = "stm32l4a6", + ))] + let mut alrmbr = rtc.alrmbr(); + + #[cfg(any( + feature = "stm32l4r5" + ))] + let mut alrmbr = rtc.alrmbr; + + alrmbr.modify(|_, w| unsafe { w.dt() .bits(dt) .du() diff --git a/src/tsc.rs b/src/tsc.rs index 4cef1085..10278e7e 100644 --- a/src/tsc.rs +++ b/src/tsc.rs @@ -267,7 +267,7 @@ impl Tsc { /// Reads the tsc group 2 count register /// WARNING, just returns the contents of the register! No validation of the correct pin pub fn read_unchecked(&self) -> u16 { - self.tsc.iog2cr.read().cnt().bits() + self.tsc.iog2cr().read().cnt().bits() } /// Is the tsc performing an aquisition diff --git a/src/watchdog.rs b/src/watchdog.rs index 3bce7a93..6c95ffec 100644 --- a/src/watchdog.rs +++ b/src/watchdog.rs @@ -39,9 +39,15 @@ impl IndependentWatchdog { feature = "stm32l462", feature = "stm32l433", feature = "stm32l443", + feature = "stm32l475", + feature = "stm32l476", + feature = "stm32l486", + feature = "stm32l496", + feature = "stm32l4a6", feature = "stm32l4r5", feature = "stm32l4s5", - feature = "stm32l4r9" + feature = "stm32l4r9", + feature = "stm32l4s9", ))] dbgmcu.apb1fzr1.modify(|_, w| w.dbg_iwdg_stop().bit(stop)); #[cfg(not(any( @@ -56,9 +62,15 @@ impl IndependentWatchdog { feature = "stm32l462", feature = "stm32l433", feature = "stm32l443", + feature = "stm32l475", + feature = "stm32l476", + feature = "stm32l486", + feature = "stm32l496", + feature = "stm32l4a6", feature = "stm32l4r5", feature = "stm32l4s5", - feature = "stm32l4r9" + feature = "stm32l4r9", + feature = "stm32l4s9" )))] dbgmcu.apb1_fzr1.modify(|_, w| w.dbg_iwdg_stop().bit(stop)); } From 9de5d4b6eb35973a4f0ee96129c8f76fe43836b5 Mon Sep 17 00:00:00 2001 From: DeflateAwning <11021263+DeflateAwning@users.noreply.github.com> Date: Sat, 1 Nov 2025 18:58:27 -0600 Subject: [PATCH 4/9] run `cargo fmt` to autoformat --- src/lib.rs | 5 +---- src/rcc/enable.rs | 6 +----- src/rtc.rs | 16 ++++++---------- 3 files changed, 8 insertions(+), 19 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 96c63647..79e37d5f 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -110,10 +110,7 @@ pub use stm32l4::stm32l4x5 as pac; ))] pub use stm32l4::stm32l4x6 as pac; -#[cfg(any( - feature = "stm32l4r5", - feature = "stm32l4s5" -))] +#[cfg(any(feature = "stm32l4r5", feature = "stm32l4s5"))] pub use stm32l4::stm32l4r5 as pac; #[cfg(any(feature = "stm32l4r9", feature = "stm32l4s9",))] diff --git a/src/rcc/enable.rs b/src/rcc/enable.rs index 990a46e3..7dd5fc10 100644 --- a/src/rcc/enable.rs +++ b/src/rcc/enable.rs @@ -249,17 +249,13 @@ bus! { SDMMC => (APB2, sdmmcen, sdmmcsmen, sdmmcrst), // 10 } -#[cfg(any( - feature = "stm32l412", - feature = "stm32l422", -))] +#[cfg(any(feature = "stm32l412", feature = "stm32l422",))] bus! { DAC1 => (APB1R1, dac1en, dac1smen, dac1rst), // 29 SDMMC => (APB2, sdmmcen, sdmmcsmen, sdmmcrst), // 10 } - // L4x1, L4x2, L4x5, or L4x6 #[cfg(not(any( feature = "stm32l433", diff --git a/src/rtc.rs b/src/rtc.rs index d06c6d38..c0090047 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -289,12 +289,10 @@ impl Rtc { feature = "stm32l496", feature = "stm32l4a6", ))] - let mut alrmar = rtc.alrmar(); + let mut alrmar = rtc.alrmar(); - #[cfg(any( - feature = "stm32l4r5" - ))] - let mut alrmar = rtc.alrmar; + #[cfg(any(feature = "stm32l4r5"))] + let mut alrmar = rtc.alrmar; alrmar.modify(|_, w| unsafe { w.dt() @@ -350,12 +348,10 @@ impl Rtc { feature = "stm32l496", feature = "stm32l4a6", ))] - let mut alrmbr = rtc.alrmbr(); + let mut alrmbr = rtc.alrmbr(); - #[cfg(any( - feature = "stm32l4r5" - ))] - let mut alrmbr = rtc.alrmbr; + #[cfg(any(feature = "stm32l4r5"))] + let mut alrmbr = rtc.alrmbr; alrmbr.modify(|_, w| unsafe { w.dt() From 839c18236363c0b3fe900c124ff9120bcca09189 Mon Sep 17 00:00:00 2001 From: DeflateAwning <11021263+DeflateAwning@users.noreply.github.com> Date: Sat, 1 Nov 2025 19:03:52 -0600 Subject: [PATCH 5/9] fix: L412 and L422 selection issue, reference issue --- src/rtc.rs | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/src/rtc.rs b/src/rtc.rs index c0090047..1b856948 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -275,8 +275,6 @@ impl Rtc { feature = "stm32l431", feature = "stm32l451", feature = "stm32l471", - feature = "stm32l412", - feature = "stm32l422", feature = "stm32l432", feature = "stm32l442", feature = "stm32l452", @@ -291,8 +289,8 @@ impl Rtc { ))] let mut alrmar = rtc.alrmar(); - #[cfg(any(feature = "stm32l4r5"))] - let mut alrmar = rtc.alrmar; + #[cfg(any(feature = "stm32l412", feature = "stm32l422", feature = "stm32l4r5"))] + let mut alrmar = &rtc.alrmar; alrmar.modify(|_, w| unsafe { w.dt() @@ -334,8 +332,6 @@ impl Rtc { feature = "stm32l431", feature = "stm32l451", feature = "stm32l471", - feature = "stm32l412", - feature = "stm32l422", feature = "stm32l432", feature = "stm32l442", feature = "stm32l452", @@ -350,8 +346,8 @@ impl Rtc { ))] let mut alrmbr = rtc.alrmbr(); - #[cfg(any(feature = "stm32l4r5"))] - let mut alrmbr = rtc.alrmbr; + #[cfg(any(feature = "stm32l412", feature = "stm32l422", feature = "stm32l4r5"))] + let mut alrmbr = &rtc.alrmbr; alrmbr.modify(|_, w| unsafe { w.dt() From 19bafae3451971515d3cab1a653175e4ebdf772e Mon Sep 17 00:00:00 2001 From: DeflateAwning <11021263+DeflateAwning@users.noreply.github.com> Date: Sat, 1 Nov 2025 19:17:01 -0600 Subject: [PATCH 6/9] fix: RTC feature gates list --- src/rtc.rs | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/src/rtc.rs b/src/rtc.rs index 1b856948..fa17f7a0 100644 --- a/src/rtc.rs +++ b/src/rtc.rs @@ -286,10 +286,17 @@ impl Rtc { feature = "stm32l486", feature = "stm32l496", feature = "stm32l4a6", + feature = "stm32l4r9", + feature = "stm32l4s9" ))] let mut alrmar = rtc.alrmar(); - #[cfg(any(feature = "stm32l412", feature = "stm32l422", feature = "stm32l4r5"))] + #[cfg(any( + feature = "stm32l412", + feature = "stm32l422", + feature = "stm32l4r5", + feature = "stm32l4s5" + ))] let mut alrmar = &rtc.alrmar; alrmar.modify(|_, w| unsafe { @@ -343,10 +350,17 @@ impl Rtc { feature = "stm32l486", feature = "stm32l496", feature = "stm32l4a6", + feature = "stm32l4r9", + feature = "stm32l4s9", ))] let mut alrmbr = rtc.alrmbr(); - #[cfg(any(feature = "stm32l412", feature = "stm32l422", feature = "stm32l4r5"))] + #[cfg(any( + feature = "stm32l412", + feature = "stm32l422", + feature = "stm32l4r5", + feature = "stm32l4s5", + ))] let mut alrmbr = &rtc.alrmbr; alrmbr.modify(|_, w| unsafe { From ef867355a0ffb31bb7dd81d01cf3e7d6b82cfdd8 Mon Sep 17 00:00:00 2001 From: DeflateAwning <11021263+DeflateAwning@users.noreply.github.com> Date: Sat, 1 Nov 2025 19:17:56 -0600 Subject: [PATCH 7/9] ci: Disable fail-fast in rx group --- .github/workflows/ci.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index e35a2036..c65dbf47 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -53,6 +53,7 @@ jobs: ci-rx: runs-on: ubuntu-latest strategy: + fail-fast: false matrix: rust: - stable From 58db5da8d21d8ca5d59ff7ac1c9338f314fce87a Mon Sep 17 00:00:00 2001 From: DeflateAwning <11021263+DeflateAwning@users.noreply.github.com> Date: Sat, 1 Nov 2025 19:27:42 -0600 Subject: [PATCH 8/9] hack: Feature gate `mod adc` on L4R5 --- src/lib.rs | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index 79e37d5f..9da88b25 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -124,7 +124,12 @@ pub use crate::pac as stm32; pub mod traits; -#[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] +#[cfg(not(any( + feature = "stm32l4r9", + feature = "stm32l4s9", + feature = "stm32l4r5", + feature = "stm32l4s5", +)))] pub mod adc; #[cfg(not(any(feature = "stm32l4r9", feature = "stm32l4s9",)))] #[cfg(not(any(feature = "stm32l412",)))] From cab32de9f16fb49ccaecd63b072f99e5f510b998 Mon Sep 17 00:00:00 2001 From: DeflateAwning <11021263+DeflateAwning@users.noreply.github.com> Date: Sat, 1 Nov 2025 19:28:55 -0600 Subject: [PATCH 9/9] fix: Feature gate `mod qspi` for L4R5 --- src/lib.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/lib.rs b/src/lib.rs index 9da88b25..73bc3d6e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -159,6 +159,8 @@ pub mod pwr; #[cfg(not(any( feature = "stm32l433", feature = "stm32l443", + feature = "stm32l4r5", + feature = "stm32l4s5", feature = "stm32l4r9", feature = "stm32l4s9", )))]