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lines changed Original file line number Diff line number Diff line change 66use cortex_m:: interrupt;
77
88use crate :: {
9- pac,
9+ pac:: {
10+ self ,
11+ flash:: acr:: LATENCY_A ,
12+ } ,
1013 rcc:: Rcc ,
1114} ;
1215
@@ -75,11 +78,6 @@ impl FLASH {
7578 // Enable the peripheral interface
7679 rcc. rb . ahbenr . modify ( |_, w| w. mifen ( ) . set_bit ( ) ) ;
7780
78- // Set the number of wait states to 1. This is never wrong, but will
79- // lead to suboptimal performance at lower frequencies. See STM32L0x2
80- // reference manual, section 3.3.3.
81- flash. acr . modify ( |_, w| w. latency ( ) . set_bit ( ) ) ;
82-
8381 Self {
8482 flash,
8583 flash_end,
@@ -88,6 +86,18 @@ impl FLASH {
8886 }
8987 }
9088
89+ /// Set wait states
90+ ///
91+ /// By default, the number of wait states is zero. This is not suitable for
92+ /// all configurations. Depending on the processor's voltage range and
93+ /// frequency, it might be necessary to set the number of wait states to 1.
94+ ///
95+ /// This is explained, for example, in the STM32L0x2 Reference Manual,
96+ /// section 3.3.3.
97+ pub fn set_wait_states ( & mut self , wait_states : LATENCY_A ) {
98+ self . flash . acr . modify ( |_, w| w. latency ( ) . variant ( wait_states) ) ;
99+ }
100+
91101 /// Erases a page of flash memory
92102 ///
93103 /// Attention: You must make sure that your program is not executed from the
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