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lines changed Original file line number Diff line number Diff line change @@ -379,8 +379,11 @@ impl Rcc {
379379 // The sequence to switch from Range11 normal mode to Range1 boost mode is:
380380 // 1. The system clock must be divided by 2 using the AHB prescaler before switching to a
381381 // higher system frequency.
382- self . rb . cfgr . modify ( |_, w| unsafe { w. hpre ( ) . bits ( 0b1000 ) } ) ;
383- while self . rb . cfgr . read ( ) . hpre ( ) . bits ( ) != 0b1000 { }
382+ let half_apb = ( self . rb . cfgr . read ( ) . hpre ( ) . bits ( ) + 1 ) . clamp ( 0b1000 , 0b1111 ) ;
383+ self . rb
384+ . cfgr
385+ . modify ( |_r, w| unsafe { w. hpre ( ) . bits ( half_apb) } ) ;
386+ while self . rb . cfgr . read ( ) . hpre ( ) . bits ( ) != half_apb { }
384387
385388 // 2. Clear the R1MODE bit is in the PWR_CR5 register.
386389 unsafe { pwr:: set_boost ( true ) } ;
@@ -402,8 +405,12 @@ impl Rcc {
402405
403406 // 5. Wait for at least 1us and then reconfigure the AHB prescaler to get the needed HCLK
404407 // clock frequency.
408+ let us_per_s = 1_000_000 ;
409+ // Number of cycles @ sys_freq for 1us, rounded up, this will
410+ // likely end up being 2us since the AHB prescaler is changed
411+ let delay_cycles = ( sys_freq + us_per_s - 1 ) / us_per_s;
412+ cortex_m:: asm:: delay ( delay_cycles) ;
405413
406- // TODO: Do we really need to wait another 1us or is that included in the wait loop in step 1?
407414 self . rb
408415 . cfgr
409416 . modify ( |_, w| unsafe { w. hpre ( ) . bits ( ahb_psc_bits) } ) ;
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