Merge branch 'stm32-rs:master' into master

msmouni · web-flow · commit 182b5db81a0c · 2021-07-15T12:30:46.000+02:00
diff --git a/.gitignore b/.gitignore
@@ -2,3 +2,6 @@
 **/*.orig
 **/*.rs.bk
 Cargo.lock
+
+# VS Code
+/.vscode
diff --git a/Cargo.toml b/Cargo.toml
@@ -18,6 +18,7 @@ features = ["stm32f746", "rt"]
 as-slice = "0.1.0"
 cortex-m = "0.6.0"
 cortex-m-rt = "0.6.8"
+embedded-time = "0.12.0"
 nb = "0.1.2"
 rtcc = "0.2"
 stm32f7 = "0.11.0"
diff --git a/examples/blinky_delay.rs b/examples/blinky_delay.rs
@@ -22,7 +22,7 @@ fn main() -> ! {
     let rcc = p.RCC.constrain();
 
     // Configure clock and freeze it
-    let clocks = rcc.cfgr.sysclk(216.mhz()).freeze();
+    let clocks = rcc.cfgr.sysclk(216_000_000.Hz()).freeze();
 
     // Get delay provider
     let mut delay = Delay::new(cp.SYST, clocks);
diff --git a/examples/can-echo.rs b/examples/can-echo.rs
@@ -27,9 +27,9 @@ fn main() -> ! {
     // Other boards might have a crystal with another frequency or none at all.
     let _clocks = rcc
         .cfgr
-        .hse(HSEClock::new(25.mhz(), HSEClockMode::Bypass))
-        .sysclk(216.mhz())
-        .hclk(216.mhz())
+        .hse(HSEClock::new(25_000_000.Hz(), HSEClockMode::Bypass))
+        .sysclk(216_000_000.Hz())
+        .hclk(216_000_000.Hz())
         .freeze();
 
     let gpioa = dp.GPIOA.split();
diff --git a/examples/can-loopback.rs b/examples/can-loopback.rs
@@ -29,9 +29,9 @@ fn main() -> ! {
     // resonator must be used.
     let _clocks = rcc
         .cfgr
-        .hse(HSEClock::new(25.mhz(), HSEClockMode::Bypass))
-        .sysclk(216.mhz())
-        .hclk(216.mhz())
+        .hse(HSEClock::new(25_000_000.Hz(), HSEClockMode::Bypass))
+        .sysclk(216_000_000.Hz())
+        .hclk(216_000_000.Hz())
         .freeze();
 
     let gpioa = dp.GPIOA.split();
diff --git a/examples/exti_button.rs b/examples/exti_button.rs
@@ -45,7 +45,7 @@ fn main() -> ! {
     button.enable_interrupt(&mut exti);
 
     // Freeze clocks
-    rcc.constrain().cfgr.sysclk(216.mhz()).freeze();
+    rcc.constrain().cfgr.sysclk(216_000_000.Hz()).freeze();
 
     // Save information needed by the interrupt handler to the global variable
     free(|cs| {
diff --git a/examples/fmc.rs b/examples/fmc.rs
@@ -43,7 +43,7 @@ fn main() -> ! {
     let dp = pac::Peripherals::take().unwrap();
 
     // Get the delay provider.
-    let clocks = dp.RCC.constrain().cfgr.sysclk(216.mhz()).freeze();
+    let clocks = dp.RCC.constrain().cfgr.sysclk(216_000_000.Hz()).freeze();
     let mut delay = Delay::new(cp.SYST, clocks);
 
     // IO
diff --git a/examples/serial_delay.rs b/examples/serial_delay.rs
@@ -25,7 +25,7 @@ fn main() -> ! {
     let cp = cortex_m::Peripherals::take().unwrap();
 
     let rcc = p.RCC.constrain();
-    let clocks = rcc.cfgr.sysclk(216.mhz()).freeze();
+    let clocks = rcc.cfgr.sysclk(216_000_000.Hz()).freeze();
 
     let mut delay = Delay::new(cp.SYST, clocks);
 
@@ -40,7 +40,7 @@ fn main() -> ! {
         (tx, rx),
         clocks,
         serial::Config {
-            baud_rate: 115_200.bps(),
+            baud_rate: 115_200.Bps(),
             oversampling: serial::Oversampling::By16,
             character_match: None,
         },
diff --git a/examples/serial_dma.rs b/examples/serial_dma.rs
@@ -35,7 +35,7 @@ fn main() -> ! {
 
     let dma = dma.handle.enable(&mut rcc.ahb1);
 
-    let clocks = rcc.cfgr.sysclk(216.mhz()).freeze();
+    let clocks = rcc.cfgr.sysclk(216_000_000.Hz()).freeze();
 
     let gpiod = p.GPIOD.split();
 
@@ -47,7 +47,7 @@ fn main() -> ! {
         (tx, rx),
         clocks,
         serial::Config {
-            baud_rate: 115_200.bps(),
+            baud_rate: 115_200.Bps(),
             oversampling: serial::Oversampling::By16,
             character_match: None,
         },
diff --git a/examples/serial_echo.rs b/examples/serial_echo.rs
@@ -23,7 +23,7 @@ fn main() -> ! {
     let p = pac::Peripherals::take().unwrap();
 
     let rcc = p.RCC.constrain();
-    let clocks = rcc.cfgr.sysclk(216.mhz()).freeze();
+    let clocks = rcc.cfgr.sysclk(216_000_000.Hz()).freeze();
 
     let gpioa = p.GPIOA.split();
     let gpiob = p.GPIOB.split();
@@ -36,7 +36,7 @@ fn main() -> ! {
         (tx, rx),
         clocks,
         serial::Config {
-            baud_rate: 115_200.bps(),
+            baud_rate: 115_200.Bps(),
             oversampling: serial::Oversampling::By16,
             character_match: None,
         },
diff --git a/examples/stm32f7disco-qspi-flash/main.rs b/examples/stm32f7disco-qspi-flash/main.rs
@@ -36,7 +36,7 @@ fn main() -> ! {
     );
 
     // Init clocks
-    let hse_cfg = HSEClock::new(25.mhz(), HSEClockMode::Oscillator);
+    let hse_cfg = HSEClock::new(25_000_000.Hz(), HSEClockMode::Oscillator);
     let mut rcc = rcc.constrain();
 
     // Setup DMA
@@ -45,7 +45,7 @@ fn main() -> ! {
     let dma = dma.handle.enable(&mut rcc.ahb1);
 
     // Ramp up clocks to 216 MHz
-    rcc.cfgr.hse(hse_cfg).sysclk(216.mhz()).freeze();
+    rcc.cfgr.hse(hse_cfg).sysclk(216_000_000.Hz()).freeze();
 
     // Check that we can communicate with the flash device
     mt25q.check_id();
diff --git a/examples/stm32f7disco-screen/main.rs b/examples/stm32f7disco-screen/main.rs
@@ -87,9 +87,9 @@ fn main() -> ! {
     gpioh.ph1.into_floating_input();
     let _clocks = rcc_hal
         .cfgr
-        .hse(HSEClock::new(25.mhz(), HSEClockMode::Bypass))
-        .sysclk(216.mhz())
-        .hclk(216.mhz())
+        .hse(HSEClock::new(25_000_000.Hz(), HSEClockMode::Bypass))
+        .sysclk(216_000_000.Hz())
+        .hclk(216_000_000.Hz())
         .freeze();
 
     // LCD enable: set it low first to avoid LCD bleed while setting up timings
diff --git a/examples/stm32f7disco-screen/screen.rs b/examples/stm32f7disco-screen/screen.rs
@@ -10,8 +10,8 @@ use embedded_graphics::{
 use stm32f7xx_hal::{
     ltdc::{DisplayConfig, DisplayController, Layer, PixelFormat, SupportedWord},
     pac::{DMA2D, LTDC},
+    prelude::*,
     rcc::{HSEClock, HSEClockMode},
-    time::U32Ext,
 };
 
 /// STM32F7-DISCO board display
@@ -42,7 +42,7 @@ impl<T: 'static + SupportedWord> Stm32F7DiscoDisplay<T> {
             dma2d,
             PixelFormat::RGB565,
             DISCO_SCREEN_CONFIG,
-            Some(&HSEClock::new(25.mhz(), HSEClockMode::Bypass)),
+            Some(&HSEClock::new(25_000_000.Hz(), HSEClockMode::Bypass)),
         );
 
         Stm32F7DiscoDisplay { controller }
diff --git a/examples/timer.rs b/examples/timer.rs
@@ -32,7 +32,7 @@ fn main() -> ! {
     unsafe {
         NVIC::unmask(pac::Interrupt::TIM2);
     }
-    let mut timer = Timer::tim2(dp.TIM2, 1.hz(), clocks, &mut rcc.apb1);
+    let mut timer = Timer::tim2(dp.TIM2, 1.Hz(), clocks, &mut rcc.apb1);
     timer.listen(Event::TimeOut);
 
     loop {}
diff --git a/examples/usb_serial.rs b/examples/usb_serial.rs
@@ -34,10 +34,10 @@ fn main() -> ! {
 
     let clocks = rcc
         .cfgr
-        .hse(HSEClock::new(25.mhz(), HSEClockMode::Bypass))
+        .hse(HSEClock::new(25_000_000.Hz(), HSEClockMode::Bypass))
         .use_pll()
         .use_pll48clk()
-        .sysclk(216.mhz())
+        .sysclk(216_000_000.Hz())
         .freeze();
 
     #[cfg(feature = "usb_fs")]
diff --git a/src/dac.rs b/src/dac.rs
@@ -57,6 +57,8 @@ where
         rcc.apb1rstr.write(|w| w.dacrst().clear_bit());
 
         // NOTE(unsafe) ZST, doesn't need initialization.
+        assert!(mem::size_of::<PINS::Output>() == 0);
+        #[allow(clippy::uninit_assumed_init)]
         mem::MaybeUninit::uninit().assume_init()
     }
 }
diff --git a/src/delay.rs b/src/delay.rs
@@ -18,7 +18,7 @@ impl Delay {
     pub fn new(mut syst: SYST, clocks: Clocks) -> Self {
         syst.set_clock_source(SystClkSource::External);
 
-        Delay { syst, clocks }
+        Delay { clocks, syst }
     }
 
     /// Releases the system timer (SysTick) resource
diff --git a/src/dma.rs b/src/dma.rs
@@ -264,6 +264,7 @@ where
     /// Consumes this instance of `Transfer` and returns another instance with
     /// its type state set to indicate the transfer has been started.
     pub fn start(self, handle: &Handle<T::Instance, state::Enabled>) -> Transfer<T, B, Started> {
+        T::Stream::clear_status_flags(&handle.dma);
         atomic::fence(Ordering::SeqCst);
 
         handle.dma.st[T::Stream::number()]
@@ -290,6 +291,13 @@ where
             .is_enabled()
     }
 
+    /// Try to cancel an in process transfer. Check is_active to verify cancellation
+    pub fn cancel(&self, handle: &Handle<T::Instance, state::Enabled>) {
+        handle.dma.st[T::Stream::number()]
+            .cr
+            .write(|w| w.en().disabled());
+    }
+
     /// Waits for the transfer to end
     ///
     /// This method will block if the transfer is still ongoing. If you want
@@ -568,7 +576,7 @@ impl_stream!(
 /// This is an internal trait. End users neither need to implement it, nor use
 /// it directly.
 pub trait Channel {
-    fn select<'r>(w: &'r mut dma2::st::cr::W) -> &'r mut dma2::st::cr::W;
+    fn select(w: &mut dma2::st::cr::W) -> &mut dma2::st::cr::W;
 }
 
 macro_rules! impl_channel {
diff --git a/src/flash.rs b/src/flash.rs
@@ -105,11 +105,7 @@ impl Flash {
     /// Programs a block of flash memory.
     ///
     /// This method blocks until the block is programed or an error occurred.
-    pub fn blocking_program<'a, 'b>(
-        &'a mut self,
-        start_offset: usize,
-        data: &'b [u8],
-    ) -> Result<(), Error> {
+    pub fn blocking_program(&mut self, start_offset: usize, data: &[u8]) -> Result<(), Error> {
         let mut sequence = self.program(start_offset, data)?;
         block!(sequence.wait())
     }
@@ -122,9 +118,9 @@ impl Flash {
     /// Returns an error if the flash is locked or busy.
     fn check_locked_or_busy(&self) -> Result<(), Error> {
         if self.is_locked() {
-            return Err(Error::Locked);
+            Err(Error::Locked)
         } else if self.is_busy() {
-            return Err(Error::Busy);
+            Err(Error::Busy)
         } else {
             Ok(())
         }
diff --git a/src/fmc.rs b/src/fmc.rs
@@ -6,9 +6,9 @@
 use stm32_fmc::FmcPeripheral;
 use stm32_fmc::{AddressPinSet, PinsSdram, Sdram, SdramChip, SdramPinSet, SdramTargetBank};
 
+use crate::embedded_time::rate::Hertz;
 use crate::pac as stm32;
 use crate::rcc::Clocks;
-use crate::time::Hertz;
 
 use crate::gpio::gpioa::PA7;
 use crate::gpio::gpiob::{PB5, PB6, PB7};
diff --git a/src/i2c.rs b/src/i2c.rs
@@ -3,6 +3,7 @@
 
 // NB : this implementation started as a modified copy of https://github.com/stm32-rs/stm32f1xx-hal/blob/master/src/i2c.rs
 
+use crate::embedded_time::rate::Hertz;
 #[cfg_attr(test, allow(unused_imports))]
 use crate::gpio::gpioa::PA8;
 use crate::gpio::gpiob::{PB10, PB11, PB6, PB7, PB8, PB9};
@@ -13,7 +14,6 @@ use crate::gpio::{Alternate, AF4};
 use crate::hal::blocking::i2c::{Read, Write, WriteRead};
 use crate::pac::{DWT, I2C1, I2C2, I2C3};
 use crate::rcc::{sealed::RccBus, Clocks, Enable, GetBusFreq, Reset};
-use crate::time::Hertz;
 use micromath::F32Ext;
 use nb::Error::{Other, WouldBlock};
 use nb::{Error as NbError, Result as NbResult};
@@ -22,6 +22,7 @@ use cast::u16;
 
 /// I2C error
 #[derive(Debug, Eq, PartialEq)]
+#[non_exhaustive]
 pub enum Error {
     /// Bus error
     Bus,
@@ -36,9 +37,8 @@ pub enum Error {
     // Pec, // SMBUS mode only
     // Timeout, // SMBUS mode only
     // Alert, // SMBUS mode only
-    #[doc(hidden)]
-    _Extensible,
 }
+
 /// SPI mode. The user should make sure that the requested frequency can be
 /// generated considering the buses clocks.
 #[derive(Debug, PartialEq)]
@@ -217,10 +217,10 @@ fn blocking_i2c<I2C, SCL, SDA>(
     data_timeout_us: u32,
 ) -> BlockingI2c<I2C, SCL, SDA> {
     let sysclk_mhz = clocks.sysclk().0 / 1_000_000;
-    return BlockingI2c {
+    BlockingI2c {
         nb: i2c,
         data_timeout: data_timeout_us * sysclk_mhz,
-    };
+    }
 }
 
 // hddat and vddat are removed because SDADEL is always going to be 0 in this implementation so
@@ -306,7 +306,7 @@ fn calculate_timing(
     let mut presc: u8;
     // if ratio is > (scll+sclh)*presc. that frequancy is not possible to generate. so
     // minimum frequancy possible is generated
-    if product > 8192 as f32 {
+    if product > 8192_f32 {
         // TODO: should we panic or use minimum allowed frequancy
         scl_l = 0x7fu8;
         scl_h = 0x7fu8;
@@ -441,8 +441,8 @@ macro_rules! hal {
                                 presc:  ((timing_r & 0xf000_0000) >> 28 ) as u8,
                                 scldel: ((timing_r & 0x00f0_0000) >> 20 ) as u8 ,
                                 sdadel: ((timing_r & 0x000f_0000) >> 16 ) as u8,
-                                sclh:   ((timing_r & 0x0000_ff00) >> 08 ) as u8,
-                                scll:   ((timing_r & 0x0000_00ff) >> 00 ) as u8,
+                                sclh:   ((timing_r & 0x0000_ff00) >> 8 ) as u8,
+                                scll:   ((timing_r & 0x0000_00ff) >> 0 ) as u8,
                             }
                         }
                     };
diff --git a/src/lib.rs b/src/lib.rs
@@ -24,6 +24,7 @@ compile_error!(
 );
 
 pub(crate) use embedded_hal as hal;
+pub use embedded_time;
 
 #[cfg(feature = "stm32f722")]
 pub use stm32f7::stm32f7x2 as pac;
@@ -135,9 +136,6 @@ pub mod serial;
 #[cfg(feature = "device-selected")]
 pub mod spi;
 
-#[cfg(feature = "device-selected")]
-pub mod time;
-
 #[cfg(feature = "device-selected")]
 pub mod timer;
 
diff --git a/src/ltdc.rs b/src/ltdc.rs
@@ -343,7 +343,7 @@ impl<T: 'static + SupportedWord> DisplayController<T> {
     /// Draw a pixel at position (x,y) on the given layer
     pub fn draw_pixel(&mut self, layer: Layer, x: usize, y: usize, color: T) {
         if x >= self.config.active_width as usize || y >= self.config.active_height as usize {
-            loop {}
+            panic!("Invalid (x,y) pixel position");
         }
 
         match layer {
@@ -357,6 +357,9 @@ impl<T: 'static + SupportedWord> DisplayController<T> {
     }
 
     /// Draw hardware accelerated rectangle
+    ///
+    /// # Safety
+    ///
     /// TODO: use safer DMA transfers
     pub unsafe fn draw_rectangle(
         &mut self,
diff --git a/src/otg_fs.rs b/src/otg_fs.rs
@@ -5,12 +5,12 @@
 
 use crate::pac;
 
+use crate::embedded_time::rate::Hertz;
 use crate::gpio::{
     gpioa::{PA11, PA12},
     Alternate, AF10,
 };
 use crate::rcc::Clocks;
-use crate::time::Hertz;
 
 pub use synopsys_usb_otg::UsbBus;
 use synopsys_usb_otg::UsbPeripheral;
diff --git a/src/otg_hs.rs b/src/otg_hs.rs
diff --git a/src/prelude.rs b/src/prelude.rs
diff --git a/src/qspi.rs b/src/qspi.rs
diff --git a/src/rcc.rs b/src/rcc.rs
diff --git a/src/rtc.rs b/src/rtc.rs
diff --git a/src/serial.rs b/src/serial.rs
diff --git a/src/spi.rs b/src/spi.rs
diff --git a/src/time.rs b/src/time.rs
diff --git a/src/timer.rs b/src/timer.rs
