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burrbullburrbull
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with_pwm macro cleanups
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-73
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‎src/timer.rs‎

Lines changed: 42 additions & 73 deletions
Original file line numberDiff line numberDiff line change
@@ -310,7 +310,7 @@ macro_rules! hal {
310310
$Timer:ident,
311311
$bits:ty,
312312
$(dmar: $memsize:ty,)?
313-
$(c: ($CNUM:ident, $cnum:literal $(, $aoe:ident)?),)?
313+
$(c: ($cnum:tt $(, $aoe:ident)?),)?
314314
$(m: $timbase:ident,)?
315315
],)+) => {
316316
$(
@@ -498,7 +498,7 @@ macro_rules! hal {
498498
}
499499
)?
500500

501-
with_pwm!($TIM: $CNUM $(, $aoe)?);
501+
with_pwm!($TIM: $cnum $(, $aoe)?);
502502
unsafe impl<const C: u8> PeriAddress for CCR<$TIM, C> {
503503
#[inline(always)]
504504
fn address(&self) -> u32 {
@@ -533,78 +533,47 @@ macro_rules! with_dmar {
533533
}
534534

535535
macro_rules! with_pwm {
536-
($TIM:ty: CH1) => {
536+
($TIM:ty: [$($Cx:ident, $ccmrx_output:ident, $ocxpe:ident, $ocxm:ident;)+] $(, $aoe:ident)?) => {
537537
impl WithPwm for $TIM {
538538
#[inline(always)]
539539
fn preload_output_channel_in_mode(&mut self, channel: Channel, mode: Ocm) {
540540
match channel {
541-
Channel::C1 => {
542-
self.ccmr1_output()
543-
.modify(|_, w| w.oc1pe().set_bit().oc1m().bits(mode as _) );
544-
}
541+
$(
542+
Channel::$Cx => {
543+
self.$ccmrx_output()
544+
.modify(|_, w| w.$ocxpe().set_bit().$ocxm().bits(mode as _) );
545+
}
546+
)+
547+
#[allow(unreachable_patterns)]
545548
_ => {},
546549
}
547550
}
548551

549552
#[inline(always)]
550553
fn start_pwm(&mut self) {
554+
$(let $aoe = self.bdtr.modify(|_, w| w.aoe().set_bit());)?
551555
self.cr1.modify(|_, w| w.cen().set_bit());
552556
}
553557
}
554558
};
555-
($TIM:ty: CH2) => {
556-
impl WithPwm for $TIM {
557-
#[inline(always)]
558-
fn preload_output_channel_in_mode(&mut self, channel: Channel, mode: Ocm) {
559-
match channel {
560-
Channel::C1 => {
561-
self.ccmr1_output()
562-
.modify(|_, w| w.oc1pe().set_bit().oc1m().bits(mode as _) );
563-
}
564-
Channel::C2 => {
565-
self.ccmr1_output()
566-
.modify(|_, w| w.oc2pe().set_bit().oc2m().bits(mode as _) );
567-
}
568-
_ => {},
569-
}
570-
}
571-
572-
#[inline(always)]
573-
fn start_pwm(&mut self) {
574-
self.cr1.modify(|_, w| w.cen().set_bit());
575-
}
576-
}
559+
($TIM:ty: 1) => {
560+
with_pwm!($TIM: [
561+
C1, ccmr1_output, oc1pe, oc1m;
562+
]);
577563
};
578-
($TIM:ty: CH4 $(, $aoe:ident)?) => {
579-
impl WithPwm for $TIM {
580-
#[inline(always)]
581-
fn preload_output_channel_in_mode(&mut self, channel: Channel, mode: Ocm) {
582-
match channel {
583-
Channel::C1 => {
584-
self.ccmr1_output()
585-
.modify(|_, w| w.oc1pe().set_bit().oc1m().bits(mode as _) );
586-
}
587-
Channel::C2 => {
588-
self.ccmr1_output()
589-
.modify(|_, w| w.oc2pe().set_bit().oc2m().bits(mode as _) );
590-
}
591-
Channel::C3 => {
592-
self.ccmr2_output()
593-
.modify(|_, w| w.oc3pe().set_bit().oc3m().bits(mode as _) );
594-
}
595-
Channel::C4 => {
596-
self.ccmr2_output()
597-
.modify(|_, w| w.oc4pe().set_bit().oc4m().bits(mode as _) );
598-
}
599-
}
600-
}
601-
602-
#[inline(always)]
603-
fn start_pwm(&mut self) {
604-
$(let $aoe = self.bdtr.modify(|_, w| w.aoe().set_bit());)?
605-
self.cr1.modify(|_, w| w.cen().set_bit());
606-
}
607-
}
564+
($TIM:ty: 2) => {
565+
with_pwm!($TIM: [
566+
C1, ccmr1_output, oc1pe, oc1m;
567+
C2, ccmr1_output, oc2pe, oc2m;
568+
]);
569+
};
570+
($TIM:ty: 4 $(, $aoe:ident)?) => {
571+
with_pwm!($TIM: [
572+
C1, ccmr1_output, oc1pe, oc1m;
573+
C2, ccmr1_output, oc2pe, oc2m;
574+
C3, ccmr2_output, oc3pe, oc3m;
575+
C4, ccmr2_output, oc4pe, oc4m;
576+
] $(, $aoe)?);
608577
};
609578
}
610579

@@ -761,26 +730,26 @@ pub(crate) const fn compute_arr_presc(freq: u32, clock: u32) -> (u16, u32) {
761730

762731
// All F4xx parts have these timers.
763732
hal!(
764-
pac::TIM9: [Timer9, u16, c: (CH2, 2),],
765-
pac::TIM11: [Timer11, u16, c: (CH1, 1),],
733+
pac::TIM9: [Timer9, u16, c: (2),],
734+
pac::TIM11: [Timer11, u16, c: (1),],
766735
);
767736

768737
// All parts except for F410 add these timers.
769738
#[cfg(not(feature = "gpio-f410"))]
770739
hal!(
771-
pac::TIM1: [Timer1, u16, dmar: u32, c: (CH4, 4, _aoe), m: tim1,],
772-
pac::TIM5: [Timer5, u32, dmar: u16, c: (CH4, 4), m: tim5,],
773-
pac::TIM2: [Timer2, u32, dmar: u16, c: (CH4, 4), m: tim2,],
774-
pac::TIM3: [Timer3, u16, dmar: u16, c: (CH4, 4), m: tim3,],
775-
pac::TIM4: [Timer4, u16, dmar: u16, c: (CH4, 4), m: tim3,],
776-
pac::TIM10: [Timer10, u16, c: (CH1, 1),],
740+
pac::TIM1: [Timer1, u16, dmar: u32, c: (4, _aoe), m: tim1,],
741+
pac::TIM5: [Timer5, u32, dmar: u16, c: (4), m: tim5,],
742+
pac::TIM2: [Timer2, u32, dmar: u16, c: (4), m: tim2,],
743+
pac::TIM3: [Timer3, u16, dmar: u16, c: (4), m: tim3,],
744+
pac::TIM4: [Timer4, u16, dmar: u16, c: (4), m: tim3,],
745+
pac::TIM10: [Timer10, u16, c: (1),],
777746
);
778747

779748
// TIM5 on F410 is 16-bit
780749
#[cfg(feature = "gpio-f410")]
781750
hal!(
782-
pac::TIM1: [Timer1, u16, dmar: u16, c: (CH4, 4, _aoe), m: tim1,],
783-
pac::TIM5: [Timer5, u16, dmar: u16, c: (CH4, 4), m: tim5,],
751+
pac::TIM1: [Timer1, u16, dmar: u16, c: (4, _aoe), m: tim1,],
752+
pac::TIM5: [Timer5, u16, dmar: u16, c: (4), m: tim5,],
784753
);
785754

786755
// All parts except F401 and F411.
@@ -791,8 +760,8 @@ hal!(pac::TIM6: [Timer6, u16, m: tim6,],);
791760
#[cfg(not(any(feature = "gpio-f401", feature = "gpio-f410", feature = "gpio-f411")))]
792761
hal!(
793762
pac::TIM7: [Timer7, u16, m: tim7,],
794-
pac::TIM8: [Timer8, u16, dmar: u32, c: (CH4, 4, _aoe), m: tim8,],
795-
pac::TIM12: [Timer12, u16, c: (CH2, 2),],
796-
pac::TIM13: [Timer13, u16, c: (CH1, 1),],
797-
pac::TIM14: [Timer14, u16, c: (CH1, 1),],
763+
pac::TIM8: [Timer8, u16, dmar: u32, c: (4, _aoe), m: tim8,],
764+
pac::TIM12: [Timer12, u16, c: (2),],
765+
pac::TIM13: [Timer13, u16, c: (1),],
766+
pac::TIM14: [Timer14, u16, c: (1),],
798767
);

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