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burrbullburrbull
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enable_unchecked
1 parent 4fe1da0 commit 2c8a587

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19 files changed

+82
-115
lines changed

19 files changed

+82
-115
lines changed

‎src/can.rs‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -78,10 +78,8 @@ impl<CAN: Instance> Can<CAN> {
7878
/// Creates a CAN interface.
7979
pub fn new(can: CAN, pins: (impl Into<CAN::Tx>, impl Into<CAN::Rx>)) -> Self {
8080
unsafe {
81-
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
82-
let rcc = &(*crate::pac::RCC::ptr());
83-
CAN::enable(rcc);
84-
CAN::reset(rcc);
81+
CAN::enable_unchecked();
82+
CAN::reset_unchecked();
8583
}
8684

8785
let pins = (pins.0.into(), pins.1.into());

‎src/crc32.rs‎

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
//! It operates word-at-a-time, and takes 4 AHB/HCLK cycles per word
88
//! to calculate. This operation stalls the AHB bus for that time.
99
10-
use crate::pac::{CRC, RCC};
10+
use crate::pac::CRC;
1111
use crate::rcc::{Enable, Reset};
1212
use core::mem::MaybeUninit;
1313
use core::ptr::copy_nonoverlapping;
@@ -21,11 +21,9 @@ impl Crc32 {
2121
/// Create a new Crc32 HAL peripheral
2222
pub fn new(crc: CRC) -> Self {
2323
unsafe {
24-
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
25-
let rcc = &(*RCC::ptr());
2624
// enable CRC clock.
27-
CRC::enable(rcc);
28-
CRC::reset(rcc);
25+
CRC::enable_unchecked();
26+
CRC::reset_unchecked();
2927
}
3028

3129
let mut new = Self { periph: crc };
@@ -120,11 +118,9 @@ impl Crc32 {
120118

121119
/// Consume the HAL peripheral, returning the PAC peripheral
122120
pub fn release(self) -> CRC {
121+
// Disable CRC clock
123122
unsafe {
124-
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
125-
let rcc = &(*RCC::ptr());
126-
// Disable CRC clock
127-
CRC::disable(rcc);
123+
CRC::disable_unchecked();
128124
}
129125

130126
self.periph

‎src/dac.rs‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -54,12 +54,9 @@ where
5454
PINS: Pins<DAC>,
5555
{
5656
unsafe {
57-
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
58-
let rcc = &(*RCC::ptr());
59-
6057
// Enable and reset clock.
61-
DAC::enable(rcc);
62-
DAC::reset(rcc);
58+
DAC::enable_unchecked();
59+
DAC::reset_unchecked();
6360

6461
PINS::init()
6562
}

‎src/dma/mod.rs‎

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,6 @@ use core::{
1717
};
1818
use embedded_dma::{ReadBuffer, WriteBuffer};
1919

20-
use crate::pac::RCC;
2120
use crate::{pac, rcc};
2221

2322
pub mod traits;
@@ -267,10 +266,8 @@ impl<DMA: rcc::Enable + rcc::Reset> StreamsTuple<DMA> {
267266
/// Splits the DMA peripheral into streams.
268267
pub fn new(_regs: DMA) -> Self {
269268
unsafe {
270-
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
271-
let rcc = &(*RCC::ptr());
272-
DMA::enable(rcc);
273-
DMA::reset(rcc);
269+
DMA::enable_unchecked();
270+
DMA::reset_unchecked();
274271
}
275272
Self(
276273
StreamX::new(),

‎src/fsmc_lcd/mod.rs‎

Lines changed: 4 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -204,11 +204,9 @@ where
204204
) -> (Self, PINS::Lcds) {
205205
use self::sealed::Conjure;
206206
unsafe {
207-
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
208-
let rcc = &(*RCC::ptr());
209207
// Enable the FSMC/FMC peripheral
210-
FSMC::enable(rcc);
211-
FSMC::reset(rcc);
208+
FSMC::enable_unchecked();
209+
FSMC::reset_unchecked();
212210
}
213211

214212
// Configure memory type and basic interface settings
@@ -238,13 +236,10 @@ where
238236
/// This function also resets and disables the FSMC.
239237
pub fn release(self, _lcds: PINS::Lcds) -> (FSMC, PINS) {
240238
unsafe {
241-
//NOTE(unsafe) this reference will only be used for atomic writes with no side effects
242-
let rcc = &(*RCC::ptr());
243-
// All STM32F4 models with an FSMC or FMC use bit 0 in AHB3ENR and AHB3RSTR.
244239
// Reset FSMC/FMC
245-
FSMC::reset(rcc);
240+
FSMC::reset_unchecked();
246241
// Disable the FSMC/FMC peripheral
247-
FSMC::disable(rcc);
242+
FSMC::disable_unchecked();
248243
}
249244

250245
(self.fsmc, self.pins)

‎src/gpio.rs‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -490,7 +490,7 @@ macro_rules! gpio {
490490
]) => {
491491
/// GPIO
492492
pub mod $gpiox {
493-
use crate::pac::{$GPIOX, RCC};
493+
use crate::pac::$GPIOX;
494494
use crate::rcc::{Enable, Reset};
495495

496496
/// GPIO parts
@@ -506,12 +506,9 @@ macro_rules! gpio {
506506

507507
fn split(self) -> Parts {
508508
unsafe {
509-
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
510-
let rcc = &(*RCC::ptr());
511-
512509
// Enable clock.
513-
$GPIOX::enable(rcc);
514-
$GPIOX::reset(rcc);
510+
$GPIOX::enable_unchecked();
511+
$GPIOX::reset_unchecked();
515512
}
516513
Parts {
517514
$(

‎src/i2c.rs‎

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,6 @@ use crate::pac::{self, i2c1};
44
use crate::rcc::{Enable, Reset};
55

66
use crate::gpio;
7-
use crate::pac::RCC;
87

98
use crate::rcc::Clocks;
109
use embedded_hal_one::i2c::blocking::Operation;
@@ -162,12 +161,9 @@ where
162161
clocks: &Clocks,
163162
) -> Self {
164163
unsafe {
165-
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
166-
let rcc = &(*RCC::ptr());
167-
168164
// Enable and reset clock.
169-
I2C::enable(rcc);
170-
I2C::reset(rcc);
165+
I2C::enable_unchecked();
166+
I2C::reset_unchecked();
171167
}
172168

173169
let pins = (pins.0.into(), pins.1.into());

‎src/i2s.rs‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
//! This module is only available if the `i2s` feature is enabled.
44
55
use crate::gpio::{self, NoPin};
6-
use crate::pac::{self, RCC};
6+
use crate::pac;
77
use crate::rcc;
88
use crate::rcc::Clocks;
99
use fugit::HertzU32 as Hertz;
@@ -94,11 +94,9 @@ impl<SPI: Instance> I2s<SPI> {
9494
) -> Self {
9595
let input_clock = SPI::i2s_freq(clocks);
9696
unsafe {
97-
// NOTE(unsafe) this reference will only be used for atomic writes with no side effects.
98-
let rcc = &(*RCC::ptr());
9997
// Enable clock, enable reset, clear, reset
100-
SPI::enable(rcc);
101-
SPI::reset(rcc);
98+
SPI::enable_unchecked();
99+
SPI::reset_unchecked();
102100
}
103101

104102
let pins = (pins.0.into(), pins.1.into(), pins.2.into(), pins.3.into());

‎src/otg_fs.rs‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -62,12 +62,10 @@ unsafe impl UsbPeripheral for USB {
6262
const ENDPOINT_COUNT: usize = 6;
6363

6464
fn enable() {
65-
let rcc = unsafe { &*pac::RCC::ptr() };
66-
6765
cortex_m::interrupt::free(|_| {
6866
// Enable USB peripheral
69-
pac::OTG_FS_GLOBAL::enable(rcc);
70-
pac::OTG_FS_GLOBAL::reset(rcc);
67+
pac::OTG_FS_GLOBAL::enable_unchecked();
68+
pac::OTG_FS_GLOBAL::reset_unchecked();
7169
});
7270
}
7371

‎src/otg_hs.rs‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -55,13 +55,11 @@ unsafe impl UsbPeripheral for USB {
5555
const ENDPOINT_COUNT: usize = 9;
5656

5757
fn enable() {
58-
let rcc = unsafe { &*pac::RCC::ptr() };
59-
6058
cortex_m::interrupt::free(|_| {
6159
// Enable USB peripheral
62-
pac::OTG_HS_GLOBAL::enable(rcc);
60+
pac::OTG_HS_GLOBAL::enable_unchecked();
6361
// Reset USB peripheral
64-
pac::OTG_HS_GLOBAL::reset(rcc);
62+
pac::OTG_HS_GLOBAL::reset_unchecked();
6563
});
6664
}
6765

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