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burrbullburrbull
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Merge pull request #508 from stm32-rs/demacro
simplify timer macros for rustfmt
2 parents 4c4db73 + fd84ae5 commit a80627a

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7 files changed

+305
-313
lines changed

7 files changed

+305
-313
lines changed

‎src/adc.rs‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ use core::marker::PhantomData;
44
use embedded_hal_02::adc::{Channel, OneShot};
55
use fugit::HertzU32 as Hertz;
66

7-
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
7+
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
88
use crate::dma::dma2;
99
use crate::dma::{dma1, CircBuffer, Receive, RxDma, Transfer, TransferPayload, W};
1010
use crate::gpio::{self, Analog};
@@ -153,7 +153,7 @@ adc_pins!(pac::ADC2,
153153
gpio::PC5<Analog> => 15,
154154
);
155155

156-
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
156+
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
157157
adc_pins!(pac::ADC3,
158158
gpio::PA0<Analog> => 0,
159159
gpio::PA1<Analog> => 1,
@@ -548,7 +548,7 @@ adc_hal! {
548548
pac::ADC2: (adc2),
549549
}
550550

551-
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
551+
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
552552
adc_hal! {
553553
pac::ADC3: (adc3),
554554
}
@@ -810,7 +810,7 @@ adcdma! {
810810
)
811811
}
812812

813-
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))]
813+
#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))]
814814
adcdma! {
815815
pac::ADC3: (
816816
AdcDma3,

‎src/qei.rs‎

Lines changed: 61 additions & 72 deletions
Original file line numberDiff line numberDiff line change
@@ -6,11 +6,7 @@
66
*/
77
use core::marker::PhantomData;
88

9-
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
10-
use crate::pac::TIM1;
11-
#[cfg(feature = "medium")]
12-
use crate::pac::TIM4;
13-
use crate::pac::{TIM2, TIM3};
9+
use crate::pac;
1410
use embedded_hal_02 as hal;
1511
pub use hal::Direction;
1612

@@ -70,16 +66,16 @@ pub struct Qei<TIM, REMAP, PINS> {
7066
_remap: PhantomData<REMAP>,
7167
}
7268

73-
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
74-
impl Timer<TIM1> {
69+
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
70+
impl Timer<pac::TIM1> {
7571
pub fn qei<REMAP, PINS>(
7672
self,
7773
pins: PINS,
7874
mapr: &mut MAPR,
7975
options: QeiOptions,
80-
) -> Qei<TIM1, REMAP, PINS>
76+
) -> Qei<pac::TIM1, REMAP, PINS>
8177
where
82-
REMAP: Remap<Periph = TIM1>,
78+
REMAP: Remap<Periph = pac::TIM1>,
8379
PINS: Pins<REMAP>,
8480
{
8581
mapr.modify_mapr(|_, w| unsafe { w.tim1_remap().bits(REMAP::REMAP) });
@@ -89,15 +85,15 @@ impl Timer<TIM1> {
8985
}
9086
}
9187

92-
impl Timer<TIM2> {
88+
impl Timer<pac::TIM2> {
9389
pub fn qei<REMAP, PINS>(
9490
self,
9591
pins: PINS,
9692
mapr: &mut MAPR,
9793
options: QeiOptions,
98-
) -> Qei<TIM2, REMAP, PINS>
94+
) -> Qei<pac::TIM2, REMAP, PINS>
9995
where
100-
REMAP: Remap<Periph = TIM2>,
96+
REMAP: Remap<Periph = pac::TIM2>,
10197
PINS: Pins<REMAP>,
10298
{
10399
mapr.modify_mapr(|_, w| unsafe { w.tim2_remap().bits(REMAP::REMAP) });
@@ -107,15 +103,15 @@ impl Timer<TIM2> {
107103
}
108104
}
109105

110-
impl Timer<TIM3> {
106+
impl Timer<pac::TIM3> {
111107
pub fn qei<REMAP, PINS>(
112108
self,
113109
pins: PINS,
114110
mapr: &mut MAPR,
115111
options: QeiOptions,
116-
) -> Qei<TIM3, REMAP, PINS>
112+
) -> Qei<pac::TIM3, REMAP, PINS>
117113
where
118-
REMAP: Remap<Periph = TIM3>,
114+
REMAP: Remap<Periph = pac::TIM3>,
119115
PINS: Pins<REMAP>,
120116
{
121117
mapr.modify_mapr(|_, w| unsafe { w.tim3_remap().bits(REMAP::REMAP) });
@@ -126,15 +122,15 @@ impl Timer<TIM3> {
126122
}
127123

128124
#[cfg(feature = "medium")]
129-
impl Timer<TIM4> {
125+
impl Timer<pac::TIM4> {
130126
pub fn qei<REMAP, PINS>(
131127
self,
132128
pins: PINS,
133129
mapr: &mut MAPR,
134130
options: QeiOptions,
135-
) -> Qei<TIM4, REMAP, PINS>
131+
) -> Qei<pac::TIM4, REMAP, PINS>
136132
where
137-
REMAP: Remap<Periph = TIM4>,
133+
REMAP: Remap<Periph = pac::TIM4>,
138134
PINS: Pins<REMAP>,
139135
{
140136
mapr.modify_mapr(|_, w| w.tim4_remap().bit(REMAP::REMAP == 1));
@@ -145,68 +141,61 @@ impl Timer<TIM4> {
145141
}
146142

147143
macro_rules! hal {
148-
($($TIMX:ident: ($timX:ident, $timXen:ident, $timXrst:ident),)+) => {
149-
$(
150-
impl<REMAP, PINS> Qei<$TIMX, REMAP, PINS> {
151-
fn $timX(tim: $TIMX, pins: PINS, options: QeiOptions) -> Self {
152-
// Configure TxC1 and TxC2 as captures
153-
tim.ccmr1_input().write(|w| w.cc1s().ti1().cc2s().ti2());
154-
155-
// enable and configure to capture on rising edge
156-
tim.ccer().write(|w| {
157-
w.cc1e()
158-
.set_bit()
159-
.cc1p()
160-
.clear_bit()
161-
.cc2e()
162-
.set_bit()
163-
.cc2p()
164-
.clear_bit()
165-
});
166-
167-
// configure as quadrature encoder
168-
tim.smcr().write(|w| w.sms().set(options.slave_mode as u8));
169-
170-
tim.arr().write(|w| w.arr().set(options.auto_reload_value));
171-
tim.cr1().write(|w| w.cen().set_bit());
172-
173-
Qei { tim, pins, _remap: PhantomData }
144+
($TIMX:ty: $timX:ident, $timXen:ident, $timXrst:ident) => {
145+
impl<REMAP, PINS> Qei<$TIMX, REMAP, PINS> {
146+
fn $timX(tim: $TIMX, pins: PINS, options: QeiOptions) -> Self {
147+
// Configure TxC1 and TxC2 as captures
148+
tim.ccmr1_input().write(|w| w.cc1s().ti1().cc2s().ti2());
149+
150+
// enable and configure to capture on rising edge
151+
tim.ccer().write(|w| {
152+
w.cc1e().set_bit();
153+
w.cc1p().clear_bit();
154+
w.cc2e().set_bit();
155+
w.cc2p().clear_bit()
156+
});
157+
158+
// configure as quadrature encoder
159+
tim.smcr().write(|w| w.sms().set(options.slave_mode as u8));
160+
161+
tim.arr().write(|w| w.arr().set(options.auto_reload_value));
162+
tim.cr1().write(|w| w.cen().set_bit());
163+
164+
Qei {
165+
tim,
166+
pins,
167+
_remap: PhantomData,
174168
}
169+
}
175170

176-
pub fn release(self) -> ($TIMX, PINS) {
177-
(self.tim, self.pins)
178-
}
171+
pub fn release(self) -> ($TIMX, PINS) {
172+
(self.tim, self.pins)
179173
}
174+
}
180175

181-
impl<REMAP, PINS> hal::Qei for Qei<$TIMX, REMAP, PINS> {
182-
type Count = u16;
176+
impl<REMAP, PINS> hal::Qei for Qei<$TIMX, REMAP, PINS> {
177+
type Count = u16;
183178

184-
fn count(&self) -> u16 {
185-
self.tim.cnt().read().cnt().bits()
186-
}
179+
fn count(&self) -> u16 {
180+
self.tim.cnt().read().cnt().bits()
181+
}
187182

188-
fn direction(&self) -> Direction {
189-
if self.tim.cr1().read().dir().bit_is_clear() {
190-
Direction::Upcounting
191-
} else {
192-
Direction::Downcounting
193-
}
183+
fn direction(&self) -> Direction {
184+
if self.tim.cr1().read().dir().bit_is_clear() {
185+
Direction::Upcounting
186+
} else {
187+
Direction::Downcounting
194188
}
195189
}
196-
197-
)+
198-
}
190+
}
191+
};
199192
}
200193

201-
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
202-
hal! {
203-
TIM1: (_tim1, tim1en, tim1rst),
204-
}
205-
hal! {
206-
TIM2: (_tim2, tim2en, tim2rst),
207-
TIM3: (_tim3, tim3en, tim3rst),
208-
}
194+
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
195+
hal!(pac::TIM1: _tim1, tim1en, tim1rst);
196+
197+
hal!(pac::TIM2: _tim2, tim2en, tim2rst);
198+
hal!(pac::TIM3: _tim3, tim3en, tim3rst);
199+
209200
#[cfg(feature = "medium")]
210-
hal! {
211-
TIM4: (_tim4, tim4en, tim4rst),
212-
}
201+
hal!(pac::TIM4: _tim4, tim4en, tim4rst);

‎src/rcc/enable.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -165,14 +165,14 @@ bus! {
165165
TIM5 => (APB1, 3),
166166
}
167167

168-
#[cfg(any(feature = "xl", all(feature = "stm32f100", feature = "high",)))]
168+
#[cfg(any(feature = "xl", all(feature = "stm32f100", feature = "high")))]
169169
bus! {
170170
TIM12 => (APB1, 6),
171171
TIM13 => (APB1, 7),
172172
TIM14 => (APB1, 8),
173173
}
174174

175-
#[cfg(all(feature = "stm32f103", feature = "high",))]
175+
#[cfg(all(feature = "stm32f103", feature = "high"))]
176176
bus! {
177177
TIM8 => (APB2, 13),
178178
}

‎src/timer.rs‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -751,19 +751,19 @@ hal!(
751751
pac::TIM3: [Timer3, u16, dbg_tim3_stop, c: (CH4), m: tim2,],
752752
);
753753

754-
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))]
754+
#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity"))]
755755
hal!(
756756
pac::TIM1: [Timer1, u16, dbg_tim1_stop, c: (CH4, _aoe), m: tim1,],
757757
);
758758

759-
#[cfg(any(feature = "stm32f100", feature = "high", feature = "connectivity",))]
759+
#[cfg(any(feature = "stm32f100", feature = "high", feature = "connectivity"))]
760760
hal! {
761761
pac::TIM6: [Timer6, u16, dbg_tim6_stop, m: tim6,],
762762
}
763763

764764
#[cfg(any(
765-
all(feature = "high", any(feature = "stm32f101", feature = "stm32f103",),),
766-
any(feature = "stm32f100", feature = "connectivity",)
765+
all(feature = "high", any(feature = "stm32f101", feature = "stm32f103")),
766+
any(feature = "stm32f100", feature = "connectivity")
767767
))]
768768
hal! {
769769
pac::TIM7: [Timer7, u16, dbg_tim7_stop, m: tim6,],
@@ -786,7 +786,7 @@ hal! {
786786
pac::TIM5: [Timer5, u16, dbg_tim5_stop, c: (CH4), m: tim2,],
787787
}
788788

789-
#[cfg(all(feature = "stm32f103", feature = "high",))]
789+
#[cfg(all(feature = "stm32f103", feature = "high"))]
790790
hal! {
791791
pac::TIM8: [Timer8, u16, dbg_tim8_stop, c: (CH4, _aoe), m: tim1,],
792792
}

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