@@ -5,7 +5,7 @@ use crate::gpio::gpiob::*;
55#[ allow( unused) ]
66#[ cfg( feature = "device-selected" ) ]
77use crate :: gpio:: gpioc:: * ;
8- #[ cfg( feature = "stm32f030xc " ) ]
8+ #[ cfg( feature = "stm32f030 " ) ]
99use crate :: gpio:: gpiod:: * ;
1010#[ allow( unused) ]
1111#[ cfg( feature = "device-selected" ) ]
@@ -58,31 +58,7 @@ pins! {
5858 PA12 => { AF5 : SdaPin <I2C1 >}
5959}
6060
61- #[ cfg( feature = "stm32f030x6" ) ]
62- pins ! {
63- PA2 => { AF1 : TxPin <USART1 >} ,
64- PA3 => { AF1 : RxPin <USART1 >} ,
65- PA14 => { AF1 : TxPin <USART1 >} ,
66- PA15 => { AF1 : RxPin <USART1 >} ,
67- PB13 => { AF0 : SckPin <SPI1 >} ,
68- PB14 => { AF0 : MisoPin <SPI1 >} ,
69- PB15 => { AF0 : MosiPin <SPI1 >}
70- }
71-
72- #[ cfg( any(
73- feature = "stm32f030x8" ,
74- feature = "stm32f030xc" ,
75- feature = "stm32f042" ,
76- feature = "stm32f070" ,
77- ) ) ]
78- pins ! {
79- PA2 => { AF1 : TxPin <USART2 >} ,
80- PA3 => { AF1 : RxPin <USART2 >} ,
81- PA14 => { AF1 : TxPin <USART2 >} ,
82- PA15 => { AF1 : RxPin <USART2 >}
83- }
84-
85- #[ cfg( any( feature = "stm32f030xc" , feature = "stm32f070xb" ) ) ]
61+ #[ cfg( any( feature = "stm32f030" , feature = "stm32f070" ) ) ]
8662pins ! {
8763 PA0 => { AF4 : TxPin <USART4 >} ,
8864 PA1 => { AF4 : RxPin <USART4 >} ,
@@ -105,7 +81,7 @@ pins! {
10581 }
10682}
10783
108- #[ cfg( feature = "stm32f030xc " ) ]
84+ #[ cfg( feature = "stm32f030 " ) ]
10985pins ! {
11086 PA4 => { AF5 : TxPin <USART6 >} ,
11187 PA5 => { AF5 : RxPin <USART6 >} ,
@@ -117,6 +93,29 @@ pins! {
11793 PD2 => { AF2 : TxPin <USART5 >}
11894}
11995
96+ #[ cfg( feature = "stm32f030x6" ) ]
97+ pins ! {
98+ PA2 => { AF1 : TxPin <USART1 >} ,
99+ PA3 => { AF1 : RxPin <USART1 >} ,
100+ PA14 => { AF1 : TxPin <USART1 >} ,
101+ PA15 => { AF1 : RxPin <USART1 >} ,
102+ PB13 => { AF0 : SckPin <SPI1 >} ,
103+ PB14 => { AF0 : MisoPin <SPI1 >} ,
104+ PB15 => { AF0 : MosiPin <SPI1 >}
105+ }
106+
107+ #[ cfg( any(
108+ feature = "stm32f030x8" ,
109+ feature = "stm32f030xc" ,
110+ feature = "stm32f042" ,
111+ feature = "stm32f070" ,
112+ ) ) ]
113+ pins ! {
114+ PA2 => { AF1 : TxPin <USART2 >} ,
115+ PA3 => { AF1 : RxPin <USART2 >} ,
116+ PA14 => { AF1 : TxPin <USART2 >} ,
117+ PA15 => { AF1 : RxPin <USART2 >}
118+ }
120119#[ cfg( any(
121120 feature = "stm32f030x8" ,
122121 feature = "stm32f030xc" ,
@@ -132,39 +131,41 @@ pins! {
132131 feature = "stm32f030x6" ,
133132 feature = "stm32f030xc" ,
134133 feature = "stm32f042" ,
135- feature = "stm32f070x6" ,
134+ feature = "stm32f070x6"
136135) ) ]
137136pins ! {
138137 PA9 => { AF4 : SclPin <I2C1 >} ,
139138 PA10 => { AF4 : SdaPin <I2C1 >}
140139}
141140
142141#[ cfg( any(
143- feature = "stm32f042" ,
144142 feature = "stm32f030x6" ,
145- feature = "stm32f030x8" ,
146- feature = "stm32f030xc" ,
143+ feature = "stm32f042" ,
147144 feature = "stm32f070xb"
148145) ) ]
149146pins ! {
150147 PB10 => { AF1 : SclPin <I2C1 >} ,
151148 PB11 => { AF1 : SdaPin <I2C1 >}
152149}
153150
151+ #[ cfg( any( feature = "stm32f030x8" , feature = "stm32f030xc" ) ) ]
152+ pins ! {
153+ PB10 => { AF1 : SclPin <I2C2 >} ,
154+ PB11 => { AF1 : SdaPin <I2C1 >}
155+ }
154156#[ cfg( any(
155157 feature = "stm32f042" ,
156158 feature = "stm32f030xc" ,
157159 feature = "stm32f070x6" ,
158160) ) ]
159161pins ! {
160- PF1 => { AF1 : SclPin <I2C1 >} ,
161162 PF0 => { AF1 : SdaPin <I2C1 >}
163+ PF1 => { AF1 : SclPin <I2C1 >} ,
162164}
163165
164166#[ cfg( any(
165167 feature = "stm32f042" ,
166168 feature = "stm32f030xc" ,
167- feature = "stm32f030xc" ,
168169 feature = "stm32f070xb"
169170) ) ]
170171pins ! {
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