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therealproftherealprof
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Merge pull request #43 from jessebraham/stm32f0x1
Add support for stm32f031, stm32f051, stm32f071
2 parents c6b96c3 + ce2ef0d commit ac4c91b

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10 files changed

+129
-40
lines changed

10 files changed

+129
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‎CHANGELOG.md‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
99

1010
### Added
1111

12-
- Support for STM32F091 - @jessebraham
12+
- Support for stm32f0x1 line - @jessebraham
1313
- Support for HSE as a system clocksource (#25 - breaking change) - @zklapow
1414

1515
### Changed
@@ -66,7 +66,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
6666

6767
- Reworked GPIOs and added fully erased pins
6868
- Timer support
69-
- Support for STM32F070
69+
- Support for STM32F070 - @jessebraham
7070
- Additional peripheral support for STM32F030
7171
- Watchdog support
7272

‎Cargo.toml‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -46,15 +46,18 @@ panic-halt = "0.2.0"
4646
[features]
4747
device-selected = []
4848
rt = ["stm32f0/rt"]
49-
stm32f042 = ["stm32f0/stm32f0x2", "device-selected"]
5049
stm32f030 = ["stm32f0/stm32f0x0", "device-selected"]
5150
stm32f030x4 = ["stm32f030x6"]
5251
stm32f030x6 = ["stm32f030"]
5352
stm32f030x8 = ["stm32f030"]
5453
stm32f030xc = ["stm32f030"]
54+
stm32f031 = ["stm32f0/stm32f0x1", "device-selected"]
55+
stm32f042 = ["stm32f0/stm32f0x2", "device-selected"]
56+
stm32f051 = ["stm32f0/stm32f0x1", "device-selected"]
5557
stm32f070 = ["stm32f0/stm32f0x0", "device-selected"]
5658
stm32f070x6 = ["stm32f070"]
5759
stm32f070xb = ["stm32f070"]
60+
stm32f071 = ["stm32f0/stm32f0x1", "device-selected"]
5861
stm32f072 = ["stm32f0/stm32f0x2", "device-selected"]
5962
stm32f091 = ["stm32f0/stm32f0x1", "device-selected"]
6063

‎README.md‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,11 @@ Supported Configurations
1818
------------------------
1919

2020
* __stm32f030__ (stm32f030x4, stm32f030x6, stm32f030x8, stm32f030xc)
21+
* __stm32f031__
2122
* __stm32f042__
23+
* __stm32f051__
2224
* __stm32f070__ (stm32f070x6, stm32f070xb)
25+
* __stm32f071__
2326
* __stm32f072__
2427
* __stm32f091__
2528

‎src/adc.rs‎

Lines changed: 26 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,9 @@ adc_pins!(
206206

207207
#[cfg(any(
208208
feature = "stm32f030",
209+
feature = "stm32f051",
209210
feature = "stm32f070",
211+
feature = "stm32f071",
210212
feature = "stm32f072",
211213
feature = "stm32f091"
212214
))]
@@ -350,17 +352,38 @@ impl VRef {
350352
}
351353
}
352354

353-
#[cfg(any(feature = "stm32f042", feature = "stm32f072", feature = "stm32f091"))]
355+
#[cfg(any(
356+
feature = "stm32f031",
357+
feature = "stm32f042",
358+
feature = "stm32f051",
359+
feature = "stm32f071",
360+
feature = "stm32f072",
361+
feature = "stm32f091",
362+
))]
354363
#[derive(Debug, Default)]
355364
/// Battery reference voltage (ADC Channel 18)
356365
pub struct VBat;
357366

358-
#[cfg(any(feature = "stm32f042", feature = "stm32f072", feature = "stm32f091"))]
367+
#[cfg(any(
368+
feature = "stm32f031",
369+
feature = "stm32f042",
370+
feature = "stm32f051",
371+
feature = "stm32f071",
372+
feature = "stm32f072",
373+
feature = "stm32f091",
374+
))]
359375
adc_pins!(
360376
VBat => 18_u8,
361377
);
362378

363-
#[cfg(any(feature = "stm32f042", feature = "stm32f072", feature = "stm32f091"))]
379+
#[cfg(any(
380+
feature = "stm32f031",
381+
feature = "stm32f042",
382+
feature = "stm32f051",
383+
feature = "stm32f071",
384+
feature = "stm32f072",
385+
feature = "stm32f091",
386+
))]
364387
impl VBat {
365388
/// Init a new VBat
366389
pub fn new() -> Self {

‎src/gpio.rs‎

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -570,7 +570,9 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
570570

571571
#[cfg(any(
572572
feature = "stm32f030",
573+
feature = "stm32f051",
573574
feature = "stm32f070",
575+
feature = "stm32f071",
574576
feature = "stm32f072",
575577
feature = "stm32f091",
576578
))]
@@ -593,12 +595,12 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
593595
PC15: (pc15, 15, Input<Floating>),
594596
]);
595597

596-
#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
598+
#[cfg(any(feature = "stm32f030", feature = "stm32f051", feature = "stm32f070"))]
597599
gpio!(GPIOD, gpiod, iopden, PD, [
598600
PD2: (pd2, 2, Input<Floating>),
599601
]);
600602

601-
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
603+
#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
602604
gpio!(GPIOD, gpiod, iopden, PD, [
603605
PD0: (pd0, 0, Input<Floating>),
604606
PD1: (pd1, 1, Input<Floating>),
@@ -621,7 +623,7 @@ gpio!(GPIOD, gpiod, iopden, PD, [
621623
// TODO: The ST SVD files are missing the entire PE enable register.
622624
// Re-enable as soon as this gets fixed.
623625

624-
// #[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
626+
// #[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
625627
// gpio!(GPIOE, gpioe, iopeen, PE, [
626628
// PE0: (pe0, 0, Input<Floating>),
627629
// PE1: (pe1, 1, Input<Floating>),
@@ -648,14 +650,20 @@ gpio!(GPIOF, gpiof, iopfen, PF, [
648650
PF11: (pf11, 11, Input<Floating>),
649651
]);
650652

651-
#[cfg(feature = "stm32f030")]
653+
#[cfg(any(feature = "stm32f030", feature = "stm32f051"))]
652654
gpio!(GPIOF, gpiof, iopfen, PF, [
653655
PF0: (pf0, 0, Input<Floating>),
654656
PF1: (pf1, 1, Input<Floating>),
655657
PF4: (pf4, 4, Input<Floating>),
656658
PF5: (pf5, 5, Input<Floating>),
657-
PF6: (pf6, 5, Input<Floating>),
658-
PF7: (pf7, 5, Input<Floating>),
659+
PF6: (pf6, 6, Input<Floating>),
660+
PF7: (pf7, 7, Input<Floating>),
661+
]);
662+
663+
#[cfg(feature = "stm32f031")]
664+
gpio!(GPIOF, gpiof, iopfen, PF, [
665+
PF6: (pf6, 6, Input<Floating>),
666+
PF7: (pf7, 7, Input<Floating>),
659667
]);
660668

661669
#[cfg(feature = "stm32f070")]
@@ -664,7 +672,7 @@ gpio!(GPIOF, gpiof, iopfen, PF, [
664672
PF1: (pf1, 1, Input<Floating>),
665673
]);
666674

667-
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
675+
#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
668676
gpio!(GPIOF, gpiof, iopfen, PF, [
669677
PF0: (pf0, 0, Input<Floating>),
670678
PF1: (pf1, 1, Input<Floating>),

‎src/i2c.rs‎

Lines changed: 25 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -33,16 +33,26 @@ macro_rules! i2c_pins {
3333
}
3434
}
3535

36-
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
36+
#[cfg(any(
37+
feature = "stm32f030",
38+
feature = "stm32f031",
39+
feature = "stm32f042",
40+
feature = "stm32f051",
41+
feature = "stm32f070",
42+
feature = "stm32f071",
43+
feature = "stm32f072",
44+
feature = "stm32f091",
45+
))]
3746
i2c_pins! {
3847
I2C1 => {
39-
scl => [gpioa::PA11<Alternate<AF5>>, gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
40-
sda => [gpioa::PA12<Alternate<AF5>>, gpiob::PB7<Alternate<AF1>>, gpiob::PB9<Alternate<AF1>>],
48+
scl => [gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
49+
sda => [gpiob::PB7<Alternate<AF1>>, gpiob::PB9<Alternate<AF1>>],
4150
}
4251
}
4352
#[cfg(any(
4453
feature = "stm32f030x6",
4554
feature = "stm32f030xc",
55+
feature = "stm32f031",
4656
feature = "stm32f042",
4757
feature = "stm32f091",
4858
))]
@@ -52,7 +62,14 @@ i2c_pins! {
5262
sda => [gpioa::PA10<Alternate<AF4>>],
5363
}
5464
}
55-
#[cfg(any(feature = "stm32f042", feature = "stm32f030x6"))]
65+
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
66+
i2c_pins! {
67+
I2C1 => {
68+
scl => [gpioa::PA11<Alternate<AF5>>],
69+
sda => [gpioa::PA12<Alternate<AF5>>],
70+
}
71+
}
72+
#[cfg(any(feature = "stm32f031", feature = "stm32f042", feature = "stm32f030x6"))]
5673
i2c_pins! {
5774
I2C1 => {
5875
scl => [gpiob::PB10<Alternate<AF1>>],
@@ -66,13 +83,6 @@ i2c_pins! {
6683
sda => [gpiob::PB14<Alternate<AF5>>, gpiof::PF0<Alternate<AF1>>],
6784
}
6885
}
69-
#[cfg(any(feature = "stm32f070", feature = "stm32f072", feature = "stm32f091"))]
70-
i2c_pins! {
71-
I2C1 => {
72-
scl => [gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
73-
sda => [gpiob::PB7<Alternate<AF1>>, gpiob::PB9<Alternate<AF1>>],
74-
}
75-
}
7686
#[cfg(feature = "stm32f070x6")]
7787
i2c_pins! {
7888
I2C1 => {
@@ -88,7 +98,7 @@ i2c_pins! {
8898
}
8999
}
90100

91-
#[cfg(any(feature = "stm32f030x8"))]
101+
#[cfg(any(feature = "stm32f030x8", feature = "stm32f051"))]
92102
i2c_pins! {
93103
I2C2 => {
94104
scl => [gpiob::PB10<Alternate<AF1>>],
@@ -98,6 +108,7 @@ i2c_pins! {
98108
#[cfg(any(
99109
feature = "stm32f030xc",
100110
feature = "stm32f070xb",
111+
feature = "stm32f071",
101112
feature = "stm32f072",
102113
feature = "stm32f091",
103114
))]
@@ -150,9 +161,9 @@ i2c! {
150161

151162
#[cfg(any(
152163
feature = "stm32f030xc",
153-
// XXX: This can't be right
154-
feature = "stm32f030xc",
164+
feature = "stm32f051",
155165
feature = "stm32f070xb",
166+
feature = "stm32f071",
156167
feature = "stm32f072",
157168
feature = "stm32f091",
158169
))]

‎src/lib.rs‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,12 @@ pub use stm32f0;
66
#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
77
pub use stm32f0::stm32f0x0 as stm32;
88

9-
#[cfg(feature = "stm32f091")]
9+
#[cfg(any(
10+
feature = "stm32f031",
11+
feature = "stm32f051",
12+
feature = "stm32f071",
13+
feature = "stm32f091",
14+
))]
1015
pub use stm32f0::stm32f0x1 as stm32;
1116

1217
#[cfg(any(feature = "stm32f042", feature = "stm32f072"))]

‎src/serial.rs‎

Lines changed: 25 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -85,32 +85,45 @@ macro_rules! usart_pins {
8585
}
8686
}
8787

88-
#[cfg(any(feature = "stm32f030", feature = "stm32f042"))]
88+
#[cfg(any(
89+
feature = "stm32f030",
90+
feature = "stm32f042",
91+
feature = "stm32f051",
92+
feature = "stm32f071",
93+
))]
8994
usart_pins! {
9095
USART1 => {
9196
tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
9297
rx => [gpioa::PA10<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
9398
}
9499
}
95-
#[cfg(feature = "stm32f030x6")]
100+
#[cfg(any(feature = "stm32f031", feature = "stm32f030x6"))]
96101
usart_pins! {
97102
USART1 => {
98103
tx => [gpioa::PA2<Alternate<AF1>>, gpioa::PA14<Alternate<AF1>>],
99104
rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
100105
}
101106
}
102-
#[cfg(any(feature = "stm32f070", feature = "stm32f072", feature = "stm32f091"))]
107+
#[cfg(any(
108+
feature = "stm32f031",
109+
feature = "stm32f070",
110+
feature = "stm32f072",
111+
feature = "stm32f091",
112+
))]
103113
usart_pins! {
104114
USART1 => {
105115
tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
106116
rx => [gpioa::PA10<Alternate<AF1>>, gpiob::PB7<Alternate<AF0>>],
107117
}
108118
}
119+
109120
#[cfg(any(
110121
feature = "stm32f030x8",
111122
feature = "stm32f030xc",
112123
feature = "stm32f042",
124+
feature = "stm32f051",
113125
feature = "stm32f070",
126+
feature = "stm32f071",
114127
feature = "stm32f072",
115128
feature = "stm32f091",
116129
))]
@@ -120,16 +133,18 @@ usart_pins! {
120133
rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
121134
}
122135
}
123-
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
136+
#[cfg(any(feature = "stm32f072", feature = "stm32f071", feature = "stm32f091"))]
124137
usart_pins! {
125138
USART2 => {
126139
tx => [gpiod::PD5<Alternate<AF0>>],
127140
rx => [gpiod::PD6<Alternate<AF0>>],
128141
}
129142
}
143+
130144
#[cfg(any(
131145
feature = "stm32f030xc",
132146
feature = "stm32f070xb",
147+
feature = "stm32f071",
133148
feature = "stm32f072",
134149
feature = "stm32f091",
135150
))]
@@ -144,13 +159,14 @@ usart_pins! {
144159
rx => [gpioa::PA1<Alternate<AF4>>, gpioc::PC11<Alternate<AF0>>],
145160
}
146161
}
147-
#[cfg(any(feature = "stm32f072", feature = "stm32f091"))]
162+
#[cfg(any(feature = "stm32f071", feature = "stm32f072", feature = "stm32f091"))]
148163
usart_pins! {
149164
USART3 => {
150165
tx => [gpiod::PD8<Alternate<AF0>>],
151166
rx => [gpiod::PD9<Alternate<AF0>>],
152167
}
153168
}
169+
154170
// TODO: The ST SVD files are missing the entire PE enable register.
155171
// Re-enable as soon as this gets fixed.
156172
// #[cfg(feature = "stm32f091")]
@@ -160,6 +176,7 @@ usart_pins! {
160176
// rx => [gpioe::PE9<Alternate<AF1>>],
161177
// }
162178
// }
179+
163180
#[cfg(any(feature = "stm32f030xc", feature = "stm32f091"))]
164181
usart_pins! {
165182
USART5 => {
@@ -278,7 +295,9 @@ usart! {
278295
feature = "stm32f030x8",
279296
feature = "stm32f030xc",
280297
feature = "stm32f042",
298+
feature = "stm32f051",
281299
feature = "stm32f070",
300+
feature = "stm32f071",
282301
feature = "stm32f072",
283302
feature = "stm32f091",
284303
))]
@@ -288,6 +307,7 @@ usart! {
288307
#[cfg(any(
289308
feature = "stm32f030xc",
290309
feature = "stm32f070xb",
310+
feature = "stm32f071",
291311
feature = "stm32f072",
292312
feature = "stm32f091",
293313
))]

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