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Yatekiitherealprof
Yatekii
authored and
therealprof
committed
Added definitions for the stm32f072xx chips (#31)
* Fixed wrong gpio definitions with #[cfg(any(feature = "stm32f030", feature = "stm32f070"))] * Added definitions for the 072 series
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‎.travis.yml‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,6 +12,7 @@ env:
1212
- MCU=stm32f070
1313
- MCU=stm32f070x6
1414
- MCU=stm32f070xb
15+
- MCU=stm32f072
1516
matrix:
1617
allow_failures:
1718
- rust: nightly

‎CHANGELOG.md‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
99

1010
### Added
1111

12+
- Added peripheral definitions for the stm32f072xx line - @Yatekii
13+
14+
### Changed
15+
16+
- Fixed broken PC GPIO definitions with feature = "stm32f030" and feature = "stm32f070"
1217
- More robust error handling for I2C
1318

1419
## [v0.11.0] - 2019-01-04

‎Cargo.toml‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -48,13 +48,14 @@ device-selected = []
4848
rt = ["stm32f0/rt"]
4949
stm32f042 = ["stm32f0/stm32f0x2", "device-selected"]
5050
stm32f030 = ["stm32f0/stm32f0x0", "device-selected"]
51-
stm32f030x4 = ["stm32f030x6", "device-selected"]
52-
stm32f030x6 = ["stm32f030", "device-selected"]
53-
stm32f030x8 = ["stm32f030", "device-selected"]
54-
stm32f030xc = ["stm32f030", "device-selected"]
51+
stm32f030x4 = ["stm32f030x6"]
52+
stm32f030x6 = ["stm32f030"]
53+
stm32f030x8 = ["stm32f030"]
54+
stm32f030xc = ["stm32f030"]
5555
stm32f070 = ["stm32f0/stm32f0x0", "device-selected"]
56-
stm32f070x6 = ["stm32f070", "device-selected"]
57-
stm32f070xb = ["stm32f070", "device-selected"]
56+
stm32f070x6 = ["stm32f070"]
57+
stm32f070xb = ["stm32f070"]
58+
stm32f072 = ["stm32f0/stm32f0x2", "device-selected"]
5859

5960
[profile.dev]
6061
debug = true

‎README.md‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ Currently supported configuration are:
1818
* stm32f070
1919
* stm32f070x6
2020
* stm32f070xb
21+
* stm32f072
2122

2223
The idea behind this crate is to gloss over the slight differences in the
2324
various peripherals available on those MCUs so a HAL can be written for all

‎src/adc.rs‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -216,7 +216,11 @@ adc_pins!(
216216
gpiob::PB1<Analog> => 9_u8,
217217
);
218218

219-
#[cfg(any(feature = "stm32f030", feature = "stm32f070",))]
219+
#[cfg(any(
220+
feature = "stm32f030",
221+
feature = "stm32f070",
222+
feature = "stm32f072"
223+
))]
220224
adc_pins!(
221225
gpioc::PC0<Analog> => 10_u8,
222226
gpioc::PC1<Analog> => 11_u8,
@@ -360,17 +364,17 @@ impl VRef {
360364
}
361365
}
362366

363-
#[cfg(feature = "stm32f042")]
367+
#[cfg(any(feature = "stm32f042", feature = "stm32f072"))]
364368
#[derive(Debug, Default)]
365369
/// Battery reference voltage (ADC Channel 18)
366370
pub struct VBat;
367371

368-
#[cfg(feature = "stm32f042")]
372+
#[cfg(any(feature = "stm32f042", feature = "stm32f072"))]
369373
adc_pins!(
370374
VBat => 18_u8,
371375
);
372376

373-
#[cfg(feature = "stm32f042")]
377+
#[cfg(any(feature = "stm32f042", feature = "stm32f072"))]
374378
impl VBat {
375379
/// Init a new VBat
376380
pub fn new() -> Self {

‎src/gpio.rs‎

Lines changed: 79 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -574,31 +574,81 @@ gpio!(GPIOC, gpioc, iopcen, PC, [
574574
PC15: (pc15, 15, Input<Floating>),
575575
]);
576576

577-
#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
577+
#[cfg(any(
578+
feature = "stm32f030",
579+
feature = "stm32f070",
580+
feature = "stm32f072"
581+
))]
578582
gpio!(GPIOC, gpioc, iopcen, PC, [
579-
PC0: (pb0, 0, Input<Floating>),
580-
PC1: (pb1, 1, Input<Floating>),
581-
PC2: (pb2, 2, Input<Floating>),
582-
PC3: (pb3, 3, Input<Floating>),
583-
PC4: (pb4, 4, Input<Floating>),
584-
PC5: (pb5, 5, Input<Floating>),
585-
PC6: (pb6, 6, Input<Floating>),
586-
PC7: (pb7, 7, Input<Floating>),
587-
PC8: (pb8, 8, Input<Floating>),
588-
PC9: (pb9, 9, Input<Floating>),
589-
PC10: (pb10, 10, Input<Floating>),
590-
PC11: (pb11, 11, Input<Floating>),
591-
PC12: (pb12, 12, Input<Floating>),
592-
PC13: (pb13, 13, Input<Floating>),
593-
PC14: (pb14, 14, Input<Floating>),
594-
PC15: (pb15, 15, Input<Floating>),
583+
PC0: (pc0, 0, Input<Floating>),
584+
PC1: (pc1, 1, Input<Floating>),
585+
PC2: (pc2, 2, Input<Floating>),
586+
PC3: (pc3, 3, Input<Floating>),
587+
PC4: (pc4, 4, Input<Floating>),
588+
PC5: (pc5, 5, Input<Floating>),
589+
PC6: (pc6, 6, Input<Floating>),
590+
PC7: (pc7, 7, Input<Floating>),
591+
PC8: (pc8, 8, Input<Floating>),
592+
PC9: (pc9, 9, Input<Floating>),
593+
PC10: (pc10, 10, Input<Floating>),
594+
PC11: (pc11, 11, Input<Floating>),
595+
PC12: (pc12, 12, Input<Floating>),
596+
PC13: (pc13, 13, Input<Floating>),
597+
PC14: (pc14, 14, Input<Floating>),
598+
PC15: (pc15, 15, Input<Floating>),
599+
]);
600+
601+
#[cfg(any(
602+
feature = "stm32f030",
603+
feature = "stm32f070"
604+
))]
605+
gpio!(GPIOD, gpiod, iopden, PD, [
606+
PD2: (pd2, 2, Input<Floating>),
595607
]);
596608

597-
#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
609+
#[cfg(feature = "stm32f072")]
598610
gpio!(GPIOD, gpiod, iopden, PD, [
611+
PD0: (pd0, 0, Input<Floating>),
612+
PD1: (pd1, 1, Input<Floating>),
599613
PD2: (pd2, 2, Input<Floating>),
614+
PD3: (pd3, 3, Input<Floating>),
615+
PD4: (pd4, 4, Input<Floating>),
616+
PD5: (pd5, 5, Input<Floating>),
617+
PD6: (pd6, 6, Input<Floating>),
618+
PD7: (pd7, 7, Input<Floating>),
619+
PD8: (pd8, 8, Input<Floating>),
620+
PD9: (pd9, 9, Input<Floating>),
621+
PD10: (pd10, 10, Input<Floating>),
622+
PD11: (pd11, 11, Input<Floating>),
623+
PD12: (pd12, 12, Input<Floating>),
624+
PD13: (pd13, 13, Input<Floating>),
625+
PD14: (pd14, 14, Input<Floating>),
626+
PD15: (pd15, 15, Input<Floating>),
600627
]);
601628

629+
// TODO: The ST SVD files are missing the entire PE enable register.
630+
// Re-enable as soon as this gets fixed.
631+
632+
// #[cfg(feature = "stm32f072")]
633+
// gpio!(GPIOE, gpioe, iopeen, PE, [
634+
// PE0: (pe0, 0, Input<Floating>),
635+
// PE1: (pe1, 1, Input<Floating>),
636+
// PE2: (pe2, 2, Input<Floating>),
637+
// PE3: (pe3, 3, Input<Floating>),
638+
// PE4: (pe4, 4, Input<Floating>),
639+
// PE5: (pe5, 5, Input<Floating>),
640+
// PE6: (pe6, 6, Input<Floating>),
641+
// PE7: (pe7, 7, Input<Floating>),
642+
// PE8: (pe8, 8, Input<Floating>),
643+
// PE9: (pe9, 9, Input<Floating>),
644+
// PE10: (pe10, 10, Input<Floating>),
645+
// PE11: (pe11, 11, Input<Floating>),
646+
// PE12: (pe12, 12, Input<Floating>),
647+
// PE13: (pe13, 13, Input<Floating>),
648+
// PE14: (pe14, 14, Input<Floating>),
649+
// PE15: (pe15, 15, Input<Floating>),
650+
// ]);
651+
602652
#[cfg(feature = "stm32f042")]
603653
gpio!(GPIOF, gpiof, iopfen, PF, [
604654
PF0: (pf0, 0, Input<Floating>),
@@ -621,3 +671,14 @@ gpio!(GPIOF, gpiof, iopfen, PF, [
621671
PF0: (pf0, 0, Input<Floating>),
622672
PF1: (pf1, 1, Input<Floating>),
623673
]);
674+
675+
#[cfg(feature = "stm32f072")]
676+
gpio!(GPIOF, gpiof, iopfen, PF, [
677+
PF0: (pf0, 0, Input<Floating>),
678+
PF1: (pf1, 1, Input<Floating>),
679+
PF2: (pf2, 2, Input<Floating>),
680+
PF3: (pf3, 3, Input<Floating>),
681+
PF6: (pf6, 6, Input<Floating>),
682+
PF9: (pf9, 9, Input<Floating>),
683+
PF10: (pf10, 10, Input<Floating>),
684+
]);

‎src/i2c.rs‎

Lines changed: 8 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,7 @@ i2c_pins! {
6969
sda => [gpiob::PB14<Alternate<AF5>>, gpiof::PF0<Alternate<AF1>>],
7070
}
7171
}
72-
#[cfg(feature = "stm32f070")]
72+
#[cfg(any(feature = "stm32f070", feature = "stm32f072"))]
7373
i2c_pins! {
7474
I2C1 => {
7575
scl => [gpiob::PB6<Alternate<AF1>>, gpiob::PB8<Alternate<AF1>>],
@@ -83,22 +83,19 @@ i2c_pins! {
8383
sda => [gpioa::PA10<Alternate<AF4>>, gpiof::PF1<Alternate<AF1>>],
8484
}
8585
}
86-
#[cfg(any(
87-
feature = "stm32f030x8",
88-
feature = "stm32f030xc",
89-
feature = "stm32f070xb"
90-
))]
86+
87+
#[cfg(any(feature = "stm32f030x8"))]
9188
i2c_pins! {
9289
I2C2 => {
9390
scl => [gpiob::PB10<Alternate<AF1>>],
9491
sda => [gpiob::PB11<Alternate<AF1>>],
9592
}
9693
}
97-
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
94+
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb", feature = "stm32f072"))]
9895
i2c_pins! {
9996
I2C2 => {
100-
scl => [gpiob::PB13<Alternate<AF5>>],
101-
sda => [gpiob::PB14<Alternate<AF5>>],
97+
scl => [gpiob::PB10<Alternate<AF1>>, gpiob::PB13<Alternate<AF5>>],
98+
sda => [gpiob::PB11<Alternate<AF1>>, gpiob::PB14<Alternate<AF5>>],
10299
}
103100
}
104101

@@ -144,7 +141,8 @@ i2c! {
144141
feature = "stm32f030xc",
145142
// XXX: This can't be right
146143
feature = "stm32f030xc",
147-
feature = "stm32f070xb"
144+
feature = "stm32f070xb",
145+
feature = "stm32f072"
148146
))]
149147
i2c! {
150148
I2C2: (i2c2, i2c2en, i2c2rst, apb1enr, apb1rstr),

‎src/lib.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33

44
pub use stm32f0;
55

6-
#[cfg(feature = "stm32f042")]
6+
#[cfg(any(feature = "stm32f042", feature = "stm32f072"))]
77
pub use stm32f0::stm32f0x2 as stm32;
88

99
#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]

‎src/serial.rs‎

Lines changed: 27 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@ usart_pins! {
9595
rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
9696
}
9797
}
98-
#[cfg(feature = "stm32f070")]
98+
#[cfg(any(feature = "stm32f070", feature = "stm32f072"))]
9999
usart_pins! {
100100
USART1 => {
101101
tx => [gpioa::PA9<Alternate<AF1>>, gpiob::PB6<Alternate<AF0>>],
@@ -107,14 +107,26 @@ usart_pins! {
107107
feature = "stm32f030xc",
108108
feature = "stm32f042",
109109
feature = "stm32f070",
110+
feature = "stm32f072",
110111
))]
111112
usart_pins! {
112113
USART2 => {
113114
tx => [gpioa::PA2<Alternate<AF1>>, gpioa::PA14<Alternate<AF1>>],
114115
rx => [gpioa::PA3<Alternate<AF1>>, gpioa::PA15<Alternate<AF1>>],
115116
}
116117
}
117-
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
118+
#[cfg(feature = "stm32f072")]
119+
usart_pins! {
120+
USART2 => {
121+
tx => [gpiod::PD5<Alternate<AF0>>],
122+
rx => [gpiod::PD6<Alternate<AF0>>],
123+
}
124+
}
125+
#[cfg(any(
126+
feature = "stm32f030xc",
127+
feature = "stm32f070xb",
128+
feature = "stm32f072"
129+
))]
118130
usart_pins! {
119131
USART3 => {
120132
// According to the datasheet PB10 is both tx and rx, but in stm32cubemx it's only tx
@@ -126,6 +138,13 @@ usart_pins! {
126138
rx => [gpioa::PA1<Alternate<AF4>>, gpioc::PC11<Alternate<AF0>>],
127139
}
128140
}
141+
#[cfg(feature = "stm32f072")]
142+
usart_pins! {
143+
USART3 => {
144+
tx => [gpiod::PD8<Alternate<AF0>>],
145+
rx => [gpiod::PD9<Alternate<AF0>>],
146+
}
147+
}
129148
#[cfg(feature = "stm32f030xc")]
130149
usart_pins! {
131150
USART5 => {
@@ -240,11 +259,16 @@ usart! {
240259
feature = "stm32f030xc",
241260
feature = "stm32f042",
242261
feature = "stm32f070",
262+
feature = "stm32f072",
243263
))]
244264
usart! {
245265
USART2: (usart2, usart2en, apb1enr),
246266
}
247-
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
267+
#[cfg(any(
268+
feature = "stm32f030xc",
269+
feature = "stm32f070xb",
270+
feature = "stm32f072",
271+
))]
248272
usart! {
249273
USART3: (usart3, usart3en, apb1enr),
250274
USART4: (usart4, usart4en, apb1enr),

‎src/spi.rs‎

Lines changed: 29 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,8 @@ use crate::stm32::SPI1;
1313
#[cfg(any(
1414
feature = "stm32f030x8",
1515
feature = "stm32f030xc",
16-
feature = "stm32f070xb"
16+
feature = "stm32f070xb",
17+
feature = "stm32f072",
1718
))]
1819
use crate::stm32::SPI2;
1920

@@ -87,10 +88,23 @@ spi_pins! {
8788
mosi => [gpiob::PB15<Alternate<AF0>>],
8889
}
8990
}
91+
92+
// TODO: The ST SVD files are missing the entire PE enable register.
93+
// So those pins do not exist in the register definitions.
94+
// Re-enable as soon as this gets fixed.
95+
// #[cfg(feature = "stm32f072")]
96+
// spi_pins! {
97+
// SPI1 => {
98+
// sck => [gpioe::PE13<Alternate<AF1>>],
99+
// miso => [gpioe::PE14<Alternate<AF1>>],
100+
// mosi => [gpioe::PE15<Alternate<AF1>>],
101+
// }
102+
// }
90103
#[cfg(any(
91104
feature = "stm32f030x8",
92105
feature = "stm32f030xc",
93-
feature = "stm32f070xb"
106+
feature = "stm32f070xb",
107+
feature = "stm32f072",
94108
))]
95109
spi_pins! {
96110
SPI2 => {
@@ -99,14 +113,26 @@ spi_pins! {
99113
mosi => [gpiob::PB15<Alternate<AF0>>],
100114
}
101115
}
102-
#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
116+
#[cfg(any(
117+
feature = "stm32f030xc",
118+
feature = "stm32f070xb",
119+
feature = "stm32f072",
120+
))]
103121
spi_pins! {
104122
SPI2 => {
105123
sck => [gpiob::PB10<Alternate<AF5>>],
106124
miso => [gpioc::PC2<Alternate<AF1>>],
107125
mosi => [gpioc::PC3<Alternate<AF1>>],
108126
}
109127
}
128+
#[cfg(feature = "stm32f072")]
129+
spi_pins! {
130+
SPI2 => {
131+
sck => [gpiod::PD1<Alternate<AF1>>],
132+
miso => [gpiod::PD3<Alternate<AF1>>],
133+
mosi => [gpiod::PD4<Alternate<AF1>>],
134+
}
135+
}
110136

111137
#[allow(unused)]
112138
macro_rules! spi {

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