File tree Expand file tree Collapse file tree 1 file changed +10
-2
lines changed Expand file tree Collapse file tree 1 file changed +10
-2
lines changed Original file line number Diff line number Diff line change @@ -415,7 +415,6 @@ impl EthernetPTP {
415415 is_tsint
416416 }
417417
418- #[ cfg( feature = "f-series" ) ]
419418 /// Configure the PPS output frequency.
420419 ///
421420 /// The PPS output frequency becomes `2 ^ pps_freq`. `pps_freq` is
@@ -426,10 +425,19 @@ impl EthernetPTP {
426425 // SAFETY: we atomically write to the PTPPPSCR register, which is
427426 // not read or written to anywhere else. The SVD files are incorrectly
428427 // saying that the bits in this register are read-only.
428+ #[ cfg( feature = "f-series" ) ]
429429 unsafe {
430430 let ptpppscr = self . eth_ptp . ptpppscr . as_ptr ( ) as * mut u32 ;
431431 core:: ptr:: write_volatile ( ptpppscr, pps_freq as u32 ) ;
432432 }
433+
434+ #[ cfg( feature = "stm32h7xx-hal" ) ]
435+ {
436+ // SAFETY: we only access and modify the `macppscr` (PPS Control register)
437+ let macppscr = unsafe { & self . mac ( ) . macppscr } ;
438+
439+ macppscr. modify ( |_, w| w. ppsctrl ( ) . variant ( pps_freq) ) ;
440+ }
433441 }
434442}
435443
@@ -442,7 +450,7 @@ mod test {
442450 // with the provided clock speeds.
443451 #[ test]
444452 fn hclk_to_regs ( ) {
445- for hclk_hz in ( 25 ..180 ) . map ( |v| v * 1_000_000 ) {
453+ for hclk_hz in ( 25 ..480 ) . map ( |v| v * 1_000_000 ) {
446454 let ( stssi, tsa) = EthernetPTP :: calculate_regs ( hclk_hz) ;
447455
448456 let stssi = stssi. raw ( ) as f64 ;
You can’t perform that action at this time.
0 commit comments