@@ -353,42 +353,52 @@ ap3_err_t ap3_change_channel(uint8_t padNumber)
353353 }
354354}
355355
356-
357- void ap3_pwm_wait_for_pulse ( uint32_t timer, uint32_t segment, uint32_t output, uint32_t margin) {
356+ void ap3_pwm_wait_for_pulse ( uint32_t timer, uint32_t segment, uint32_t output, uint32_t margin)
357+ {
358358
359359 volatile uint32_t *pui32CompareReg;
360360 volatile uint32_t ctimer_val;
361361 uint32_t cmpr0;
362362
363363 // Get the comapre register address
364- if ( segment == AM_HAL_CTIMER_TIMERA ){
365- if ( output == AM_HAL_CTIMER_OUTPUT_NORMAL ) {
366- pui32CompareReg = ( uint32_t *) CTIMERADDRn (CTIMER, timer, CMPRA0);
367- } else {
368- pui32CompareReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, CMPRAUXA0 );
364+ if ( segment == AM_HAL_CTIMER_TIMERA)
365+ {
366+ if (output == AM_HAL_CTIMER_OUTPUT_NORMAL)
367+ {
368+ pui32CompareReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, CMPRA0 );
369369 }
370- }else {
371- if ( output == AM_HAL_CTIMER_OUTPUT_NORMAL ){
372- pui32CompareReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, CMPRB0);
373- }else {
374- pui32CompareReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, CMPRAUXB0);
370+ else
371+ {
372+ pui32CompareReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, CMPRAUXA0);
373+ }
374+ }
375+ else
376+ {
377+ if (output == AM_HAL_CTIMER_OUTPUT_NORMAL)
378+ {
379+ pui32CompareReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, CMPRB0);
380+ }
381+ else
382+ {
383+ pui32CompareReg = (uint32_t *)CTIMERADDRn (CTIMER, timer, CMPRAUXB0);
375384 }
376385 }
377386
378387 // Get the compare value
379388 cmpr0 = ((uint32_t )(*(pui32CompareReg)) & 0x0000FFFF );
380-
389+
381390 // Wait for the timer value to be less than the compare value so that it is safe to change
382- ctimer_val = am_hal_ctimer_read ( timer, segment);
383- while ( (ctimer_val + 0 ) > cmpr0 ){
384- ctimer_val = am_hal_ctimer_read ( timer, segment);
391+ ctimer_val = am_hal_ctimer_read (timer, segment);
392+ while ((ctimer_val + 0 ) > cmpr0)
393+ {
394+ ctimer_val = am_hal_ctimer_read (timer, segment);
385395 }
386396}
387397
388398// **********************************************
389399// ap3_pwm_output
390- // - This function allows you to specify an arbitrary pwm output signal with a given frame width (fw) and time high (th).
391- // - Due to contraints of the hardware th must be lesser than fw by at least 2.
400+ // - This function allows you to specify an arbitrary pwm output signal with a given frame width (fw) and time high (th).
401+ // - Due to contraints of the hardware th must be lesser than fw by at least 2.
392402// - Furthermore fw must be at least 3 to see any high pulses
393403//
394404// This causes the most significant deviations for small values of fw. For example:
@@ -410,7 +420,7 @@ void ap3_pwm_wait_for_pulse(uint32_t timer, uint32_t segment, uint32_t output, u
410420//
411421// ...
412422//
413- // Then we conclude that for the case th == (fw - 1) the duty cycle will be 100% and
423+ // Then we conclude that for the case th == (fw - 1) the duty cycle will be 100% and
414424// the percent error from the expected duty cycle will be 100/fw
415425// **********************************************
416426
@@ -419,7 +429,8 @@ ap3_err_t ap3_pwm_output(uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk)
419429 // handle configuration, if necessary
420430 ap3_err_t retval = AP3_OK;
421431
422- if ( fw > 0 ){ // reduce fw so that the user's desired value is the period
432+ if (fw > 0 )
433+ { // reduce fw so that the user's desired value is the period
423434 fw--;
424435 }
425436
@@ -467,7 +478,7 @@ ap3_err_t ap3_pwm_output(uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk)
467478 }
468479 }
469480 else
470- { // Use the 0th index of the outcfg_tbl to select the functions
481+ { // Use the 0th index of the outcfg_tbl to select the functions
471482 timer = OUTCTIMN (ctx, 0 );
472483 if (OUTCTIMB (ctx, 0 ))
473484 {
@@ -480,16 +491,17 @@ ap3_err_t ap3_pwm_output(uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk)
480491 }
481492
482493 // Ensure that th is not greater than the fw
483- if (th > fw){
494+ if (th > fw)
495+ {
484496 th = fw;
485497 }
486498
487499 // Test for AM_HAL_CTIMER_OUTPUT_FORCE0 or AM_HAL_CTIMER_OUTPUT_FORCE1
488- if (( th == 0 ) || ( fw == 0 ))
500+ if (( th == 0 ) || (fw == 0 ))
489501 {
490502 output = AM_HAL_CTIMER_OUTPUT_FORCE0;
491503 }
492- else if ( th == fw )
504+ else if ( th == fw)
493505 {
494506 output = AM_HAL_CTIMER_OUTPUT_FORCE1;
495507 }
@@ -508,7 +520,7 @@ ap3_err_t ap3_pwm_output(uint8_t pin, uint32_t th, uint32_t fw, uint32_t clk)
508520 (AM_HAL_CTIMER_FN_PWM_REPEAT | clk));
509521
510522 // Wait until after high pulse to change the state (avoids inversion)
511- ap3_pwm_wait_for_pulse ( timer, segment, output, 10 );
523+ ap3_pwm_wait_for_pulse (timer, segment, output, 10 );
512524
513525 // If this pad uses secondary output:
514526 if (output == AM_HAL_CTIMER_OUTPUT_SECONDARY)
@@ -553,14 +565,17 @@ ap3_err_t analogWriteResolution(uint8_t res)
553565ap3_err_t analogWrite (uint8_t pin, uint32_t val)
554566{
555567 // Determine the high time based on input value and the current resolution setting
556- uint32_t fw = 0xFFFF ; // Choose the frame width in clock periods (32767 -> ~ 180 Hz)
557- if ( val == ((0x01 << _analogWriteBits ) - 1 ) ){
558- val = fw; // Enable FORCE1
559- }else {
560- val <<= (16 - _analogWriteBits); // Shift over the value to fill available resolution
561- }
562- uint32_t clk = AM_HAL_CTIMER_HFRC_12MHZ; // Use an Ambiq HAL provided value to select which clock
563-
568+ uint32_t fw = 0xFFFF ; // Choose the frame width in clock periods (32767 -> ~ 180 Hz)
569+ if (val == ((0x01 << _analogWriteBits) - 1 ))
570+ {
571+ val = fw; // Enable FORCE1
572+ }
573+ else
574+ {
575+ val <<= (16 - _analogWriteBits); // Shift over the value to fill available resolution
576+ }
577+ uint32_t clk = AM_HAL_CTIMER_HFRC_12MHZ; // Use an Ambiq HAL provided value to select which clock
578+
564579 return ap3_pwm_output (pin, val, fw, clk);
565580}
566581
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