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Commit 70416ca

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Nathan Seidle
committed
Whitespace change to SPI.cpp
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+139
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‎libraries/SPI/src/SPI.cpp‎

Lines changed: 139 additions & 97 deletions
Original file line numberDiff line numberDiff line change
@@ -30,68 +30,90 @@ const SPISettings DEFAULT_SPI_SETTINGS = SPISettings();
3030

3131
SPIClass::SPIClass(uint8_t iom_instance) : IOMaster(iom_instance)
3232
{
33-
_duplex = ap3_spi_full_duplex;
33+
_duplex = ap3_spi_full_duplex;
3434
}
3535

3636
SPIClass::SPIClass(uint8_t iom_instance, ap3_spi_duplex_e duplex) : IOMaster(iom_instance)
3737
{
38-
_duplex = duplex;
38+
_duplex = duplex;
3939
}
4040

4141
void SPIClass::begin()
4242
{
43-
ap3_err_t retval = AP3_OK;
44-
am_hal_gpio_pincfg_t pincfg = AP3_GPIO_DEFAULT_PINCFG;
45-
uint8_t funcsel = 0;
46-
47-
// init();
48-
49-
// Set up pins
50-
// clock
51-
retval = ap3_iom_pad_funcsel( _instance, AP3_IOM_SPI_SCLK, &_padSCLK, &funcsel);
52-
if( retval != AP3_OK ){ return /*retval*/; }
53-
pincfg.uFuncSel = funcsel;
54-
pincfg.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA;
55-
pincfg.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL;
56-
pincfg.uIOMnum = _instance;
57-
padMode( _padSCLK, pincfg, &retval ); if( retval != AP3_OK){ return /*ap3_return(retval)*/; }
58-
pincfg = AP3_GPIO_DEFAULT_PINCFG; // set back to default for use with next pin
59-
60-
// mosi
61-
if( _duplex & ap3_spi_tx_only ){
62-
retval = ap3_iom_pad_funcsel( _instance, AP3_IOM_SPI_MOSI, &_padMOSI, &funcsel);
63-
if( retval != AP3_OK ){ return /*retval*/; }
64-
pincfg.uFuncSel = funcsel;
65-
pincfg.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA;
66-
pincfg.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL;
67-
pincfg.uIOMnum = _instance;
68-
padMode( _padMOSI, pincfg, &retval ); if( retval != AP3_OK){ return /*ap3_return(retval)*/; }
69-
pincfg = AP3_GPIO_DEFAULT_PINCFG; // set back to default for use with next pin
70-
}
71-
72-
// miso
73-
if( _duplex & ap3_spi_rx_only ){
74-
retval = ap3_iom_pad_funcsel( _instance, AP3_IOM_SPI_MISO, &_padMISO, &funcsel);
75-
if( retval != AP3_OK ){ return /*retval*/; }
76-
pincfg.uFuncSel = funcsel;
77-
pincfg.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA;
78-
pincfg.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL;
79-
pincfg.uIOMnum = _instance;
80-
padMode( _padMISO, pincfg, &retval ); if( retval != AP3_OK){ return /*ap3_return(retval)*/; }
81-
pincfg = AP3_GPIO_DEFAULT_PINCFG; // set back to default for use with next pin
82-
}
83-
84-
85-
config(DEFAULT_SPI_SETTINGS);
43+
ap3_err_t retval = AP3_OK;
44+
am_hal_gpio_pincfg_t pincfg = AP3_GPIO_DEFAULT_PINCFG;
45+
uint8_t funcsel = 0;
46+
47+
// init();
48+
49+
// Set up pins
50+
// clock
51+
retval = ap3_iom_pad_funcsel(_instance, AP3_IOM_SPI_SCLK, &_padSCLK, &funcsel);
52+
if (retval != AP3_OK)
53+
{
54+
return /*retval*/;
55+
}
56+
pincfg.uFuncSel = funcsel;
57+
pincfg.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA;
58+
pincfg.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL;
59+
pincfg.uIOMnum = _instance;
60+
padMode(_padSCLK, pincfg, &retval);
61+
if (retval != AP3_OK)
62+
{
63+
return /*ap3_return(retval)*/;
64+
}
65+
pincfg = AP3_GPIO_DEFAULT_PINCFG; // set back to default for use with next pin
66+
67+
// mosi
68+
if (_duplex & ap3_spi_tx_only)
69+
{
70+
retval = ap3_iom_pad_funcsel(_instance, AP3_IOM_SPI_MOSI, &_padMOSI, &funcsel);
71+
if (retval != AP3_OK)
72+
{
73+
return /*retval*/;
74+
}
75+
pincfg.uFuncSel = funcsel;
76+
pincfg.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA;
77+
pincfg.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL;
78+
pincfg.uIOMnum = _instance;
79+
padMode(_padMOSI, pincfg, &retval);
80+
if (retval != AP3_OK)
81+
{
82+
return /*ap3_return(retval)*/;
83+
}
84+
pincfg = AP3_GPIO_DEFAULT_PINCFG; // set back to default for use with next pin
85+
}
86+
87+
// miso
88+
if (_duplex & ap3_spi_rx_only)
89+
{
90+
retval = ap3_iom_pad_funcsel(_instance, AP3_IOM_SPI_MISO, &_padMISO, &funcsel);
91+
if (retval != AP3_OK)
92+
{
93+
return /*retval*/;
94+
}
95+
pincfg.uFuncSel = funcsel;
96+
pincfg.eDriveStrength = AM_HAL_GPIO_PIN_DRIVESTRENGTH_12MA;
97+
pincfg.eGPOutcfg = AM_HAL_GPIO_PIN_OUTCFG_PUSHPULL;
98+
pincfg.uIOMnum = _instance;
99+
padMode(_padMISO, pincfg, &retval);
100+
if (retval != AP3_OK)
101+
{
102+
return /*ap3_return(retval)*/;
103+
}
104+
pincfg = AP3_GPIO_DEFAULT_PINCFG; // set back to default for use with next pin
105+
}
106+
107+
config(DEFAULT_SPI_SETTINGS);
86108
}
87109

88110
void SPIClass::config(SPISettings settings)
89111
{
90-
memset( (void*)&_config, 0x00, sizeof(am_hal_iom_config_t) ); // Set the IOM configuration
91-
_config.eInterfaceMode = AM_HAL_IOM_SPI_MODE;
92-
_config.ui32ClockFreq = settings.clockFreq;
93-
_config.eSpiMode = settings.dataMode;
94-
_order = settings.bitOrder;
112+
memset((void *)&_config, 0x00, sizeof(am_hal_iom_config_t)); // Set the IOM configuration
113+
_config.eInterfaceMode = AM_HAL_IOM_SPI_MODE;
114+
_config.ui32ClockFreq = settings.clockFreq;
115+
_config.eSpiMode = settings.dataMode;
116+
_order = settings.bitOrder;
95117

96118
initialize(); // Initialize the IOM
97119
}
@@ -203,94 +225,114 @@ void SPIClass::setDataMode(uint8_t mode)
203225

204226
byte SPIClass::transfer(uint8_t data)
205227
{
206-
_transfer( &data, NULL, 1);
228+
_transfer(&data, NULL, 1);
207229
}
208230

209-
uint16_t SPIClass::transfer16(uint16_t data) {
210-
union { uint16_t val; struct { uint8_t lsb; uint8_t msb; }; } t;
231+
uint16_t SPIClass::transfer16(uint16_t data)
232+
{
233+
union {
234+
uint16_t val;
235+
struct
236+
{
237+
uint8_t lsb;
238+
uint8_t msb;
239+
};
240+
} t;
211241

212242
t.val = data;
213243

214-
if ( _order == LSBFIRST) {
244+
if (_order == LSBFIRST)
245+
{
215246
t.lsb = transfer(t.lsb);
216247
t.msb = transfer(t.msb);
217-
} else {
248+
}
249+
else
250+
{
218251
t.msb = transfer(t.msb);
219252
t.lsb = transfer(t.lsb);
220253
}
221254

222255
return t.val;
223256
}
224257

225-
void SPIClass::transfer(void *buf, size_t count){
226-
_transfer( buf, buf, count); // todo: not sure how the HAL will handle sending and receiving from the same buffer...
258+
void SPIClass::transfer(void *buf, size_t count)
259+
{
260+
_transfer(buf, buf, count); // todo: not sure how the HAL will handle sending and receiving from the same buffer...
227261
}
228262

229-
void SPIClass::transferOut(void *buf, size_t count){
230-
_transfer( buf, NULL, count);
263+
void SPIClass::transferOut(void *buf, size_t count)
264+
{
265+
_transfer(buf, NULL, count);
231266
}
232267

233-
void SPIClass::transferIn(void *buf, size_t count){
234-
_transfer( NULL, buf, count);
268+
void SPIClass::transferIn(void *buf, size_t count)
269+
{
270+
_transfer(NULL, buf, count);
235271
}
236272

237-
void SPIClass::_transfer(void* buf_out, void* buf_in, size_t count)
273+
void SPIClass::_transfer(void *buf_out, void *buf_in, size_t count)
238274
{
239-
am_hal_iom_transfer_t iomTransfer = {0};
240-
// iomTransfer.uPeerInfo.ui32SpiChipSelect = cs_pad;
241-
iomTransfer.ui32InstrLen = 0; // No instructions
242-
iomTransfer.ui32Instr = 0; // No instructions
243-
iomTransfer.ui32NumBytes = count; // How many bytes to transfer
244-
// iomTransfer.eDirection = AM_HAL_IOM_TX; // AM_HAL_IOM_FULLDUPLEX - Note: Ambiq SDK says that FULLDUPLEX is not yet supported // todo:
245-
iomTransfer.pui32TxBuffer = (uint32_t*)buf_out; // todo: does this have the proper lifetime?
246-
iomTransfer.pui32RxBuffer = (uint32_t*)buf_in;
247-
iomTransfer.bContinue = false;
248-
iomTransfer.ui8RepeatCount = 0; // ?
249-
iomTransfer.ui8Priority = 1; // ?
250-
iomTransfer.ui32PauseCondition = 0; // ?
251-
iomTransfer.ui32StatusSetClr = 0; // ?
252-
253-
// Determine direction
254-
if( (buf_out != NULL) && (buf_in != NULL) ){
255-
iomTransfer.eDirection = AM_HAL_IOM_TX; // AM_HAL_IOM_FULLDUPLEX - Note: Ambiq SDK says that FULLDUPLEX is not yet supported // todo:
256-
}else if( buf_out != NULL ){
257-
iomTransfer.eDirection = AM_HAL_IOM_TX;
258-
}else if( buf_in != NULL ){
259-
iomTransfer.eDirection = AM_HAL_IOM_RX;
260-
}
261-
262-
uint32_t retVal32 = am_hal_iom_blocking_transfer(_handle, &iomTransfer);
275+
am_hal_iom_transfer_t iomTransfer = {0};
276+
// iomTransfer.uPeerInfo.ui32SpiChipSelect = cs_pad;
277+
iomTransfer.ui32InstrLen = 0; // No instructions
278+
iomTransfer.ui32Instr = 0; // No instructions
279+
iomTransfer.ui32NumBytes = count; // How many bytes to transfer
280+
// iomTransfer.eDirection = AM_HAL_IOM_TX; // AM_HAL_IOM_FULLDUPLEX - Note: Ambiq SDK says that FULLDUPLEX is not yet supported // todo:
281+
iomTransfer.pui32TxBuffer = (uint32_t *)buf_out; // todo: does this have the proper lifetime?
282+
iomTransfer.pui32RxBuffer = (uint32_t *)buf_in;
283+
iomTransfer.bContinue = false;
284+
iomTransfer.ui8RepeatCount = 0; // ?
285+
iomTransfer.ui8Priority = 1; // ?
286+
iomTransfer.ui32PauseCondition = 0; // ?
287+
iomTransfer.ui32StatusSetClr = 0; // ?
288+
289+
// Determine direction
290+
if ((buf_out != NULL) && (buf_in != NULL))
291+
{
292+
iomTransfer.eDirection = AM_HAL_IOM_TX; // AM_HAL_IOM_FULLDUPLEX - Note: Ambiq SDK says that FULLDUPLEX is not yet supported // todo:
293+
}
294+
else if (buf_out != NULL)
295+
{
296+
iomTransfer.eDirection = AM_HAL_IOM_TX;
297+
}
298+
else if (buf_in != NULL)
299+
{
300+
iomTransfer.eDirection = AM_HAL_IOM_RX;
301+
}
302+
303+
uint32_t retVal32 = am_hal_iom_blocking_transfer(_handle, &iomTransfer);
263304
if (retVal32 != 0)
264305
{
265-
// Serial.printf("got an error on _transfer: %d\n", retVal32);
266-
return /*retVal32*/;
306+
// Serial.printf("got an error on _transfer: %d\n", retVal32);
307+
return /*retVal32*/;
267308
}
268309
}
269310

270-
void SPIClass::attachInterrupt() {
311+
void SPIClass::attachInterrupt()
312+
{
271313
// Should be enableInterrupt()
272314
}
273315

274-
void SPIClass::detachInterrupt() {
316+
void SPIClass::detachInterrupt()
317+
{
275318
// Should be disableInterrupt()
276319
}
277320

278321
#if SPI_INTERFACES_COUNT > 0
279-
SPIClass SPI ( AP3_SPI_IOM, AP3_SPI_DUP );
322+
SPIClass SPI(AP3_SPI_IOM, AP3_SPI_DUP);
280323
#endif
281324
#if SPI_INTERFACES_COUNT > 1
282-
SPIClass SPI1(AP3_SPI1_IOM, AP3_SPI1_DUP );
325+
SPIClass SPI1(AP3_SPI1_IOM, AP3_SPI1_DUP);
283326
#endif
284327
#if SPI_INTERFACES_COUNT > 2
285-
SPIClass SPI2(AP3_SPI2_IOM, AP3_SPI2_DUP );
328+
SPIClass SPI2(AP3_SPI2_IOM, AP3_SPI2_DUP);
286329
#endif
287330
#if SPI_INTERFACES_COUNT > 3
288-
SPIClass SPI3(AP3_SPI3_IOM, AP3_SPI3_DUP );
331+
SPIClass SPI3(AP3_SPI3_IOM, AP3_SPI3_DUP);
289332
#endif
290333
#if SPI_INTERFACES_COUNT > 4
291-
SPIClass SPI4(AP3_SPI4_IOM, AP3_SPI4_DUP );
334+
SPIClass SPI4(AP3_SPI4_IOM, AP3_SPI4_DUP);
292335
#endif
293336
#if SPI_INTERFACES_COUNT > 5
294-
SPIClass SPI5(AP3_SPI5_IOM, AP3_SPI5_DUP );
337+
SPIClass SPI5(AP3_SPI5_IOM, AP3_SPI5_DUP);
295338
#endif
296-

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