@@ -271,79 +271,79 @@ am_hal_uart_power_control(void *pHandle,
271271 //
272272 switch (ePowerState )
273273 {
274- //
275- // Turn on the UART.
276- //
277- case AM_HAL_SYSCTRL_WAKE :
278- //
279- // Make sure we don't try to restore an invalid state.
280- //
281- if (bRetainState && !pState -> sRegState .bValid )
282- {
283- return AM_HAL_STATUS_INVALID_OPERATION ;
284- }
285-
286274 //
287- // Enable power control .
275+ // Turn on the UART .
288276 //
289- am_hal_pwrctrl_periph_enable (eUARTPowerModule );
290-
291- if (bRetainState )
292- {
277+ case AM_HAL_SYSCTRL_WAKE :
293278 //
294- // Restore UART registers
279+ // Make sure we don't try to restore an invalid state.
295280 //
296- AM_CRITICAL_BEGIN
297-
298- UARTn (ui32Module )-> ILPR = pState -> sRegState .regILPR ;
299- UARTn (ui32Module )-> IBRD = pState -> sRegState .regIBRD ;
300- UARTn (ui32Module )-> FBRD = pState -> sRegState .regFBRD ;
301- UARTn (ui32Module )-> LCRH = pState -> sRegState .regLCRH ;
302- UARTn (ui32Module )-> CR = pState -> sRegState .regCR ;
303- UARTn (ui32Module )-> IFLS = pState -> sRegState .regIFLS ;
304- UARTn (ui32Module )-> IER = pState -> sRegState .regIER ;
305-
306- pState -> sRegState .bValid = false;
281+ if (bRetainState && !pState -> sRegState .bValid )
282+ {
283+ return AM_HAL_STATUS_INVALID_OPERATION ;
284+ }
307285
308- AM_CRITICAL_END
309- }
310- break ;
286+ //
287+ // Enable power control.
288+ //
289+ am_hal_pwrctrl_periph_enable (eUARTPowerModule );
311290
312- //
313- // Turn off the UART.
314- //
315- case AM_HAL_SYSCTRL_NORMALSLEEP :
316- case AM_HAL_SYSCTRL_DEEPSLEEP :
317- if ( bRetainState )
318- {
319- AM_CRITICAL_BEGIN
320-
321- pState -> sRegState . regILPR = UARTn (ui32Module )-> ILPR ;
322- pState -> sRegState . regIBRD = UARTn (ui32Module )-> IBRD ;
323- pState -> sRegState . regFBRD = UARTn (ui32Module )-> FBRD ;
324- pState -> sRegState . regLCRH = UARTn (ui32Module )-> LCRH ;
325- pState -> sRegState . regCR = UARTn (ui32Module )-> CR ;
326- pState -> sRegState . regIFLS = UARTn ( ui32Module ) -> IFLS ;
327- pState -> sRegState .regIER = UARTn ( ui32Module ) -> IER ;
328- pState -> sRegState . bValid = true;
329-
330- AM_CRITICAL_END
331- }
291+ if ( bRetainState )
292+ {
293+ //
294+ // Restore UART registers
295+ //
296+ AM_CRITICAL_BEGIN
297+
298+ UARTn ( ui32Module ) -> ILPR = pState -> sRegState . regILPR ;
299+ UARTn ( ui32Module ) -> IBRD = pState -> sRegState . regIBRD ;
300+ UARTn (ui32Module )-> FBRD = pState -> sRegState . regFBRD ;
301+ UARTn (ui32Module )-> LCRH = pState -> sRegState . regLCRH ;
302+ UARTn (ui32Module )-> CR = pState -> sRegState . regCR ;
303+ UARTn (ui32Module )-> IFLS = pState -> sRegState . regIFLS ;
304+ UARTn (ui32Module )-> IER = pState -> sRegState . regIER ;
305+
306+ pState -> sRegState .bValid = false ;
307+
308+ AM_CRITICAL_END
309+ }
310+ break ;
332311
333312 //
334- // Clear all interrupts before sleeping as having a pending UART
335- // interrupt burns power.
313+ // Turn off the UART.
336314 //
337- am_hal_uart_interrupt_clear (pState , 0xFFFFFFFF );
315+ case AM_HAL_SYSCTRL_NORMALSLEEP :
316+ case AM_HAL_SYSCTRL_DEEPSLEEP :
317+ if (bRetainState )
318+ {
319+ AM_CRITICAL_BEGIN
320+
321+ pState -> sRegState .regILPR = UARTn (ui32Module )-> ILPR ;
322+ pState -> sRegState .regIBRD = UARTn (ui32Module )-> IBRD ;
323+ pState -> sRegState .regFBRD = UARTn (ui32Module )-> FBRD ;
324+ pState -> sRegState .regLCRH = UARTn (ui32Module )-> LCRH ;
325+ pState -> sRegState .regCR = UARTn (ui32Module )-> CR ;
326+ pState -> sRegState .regIFLS = UARTn (ui32Module )-> IFLS ;
327+ pState -> sRegState .regIER = UARTn (ui32Module )-> IER ;
328+ pState -> sRegState .bValid = true;
329+
330+ AM_CRITICAL_END
331+ }
338332
339- //
340- // Disable power control.
341- //
342- am_hal_pwrctrl_periph_disable ( eUARTPowerModule );
343- break ;
333+ //
334+ // Clear all interrupts before sleeping as having a pending UART
335+ // interrupt burns power.
336+ //
337+ am_hal_uart_interrupt_clear ( pState , 0xFFFFFFFF ) ;
344338
345- default :
346- return AM_HAL_STATUS_INVALID_ARG ;
339+ //
340+ // Disable power control.
341+ //
342+ am_hal_pwrctrl_periph_disable (eUARTPowerModule );
343+ break ;
344+
345+ default :
346+ return AM_HAL_STATUS_INVALID_ARG ;
347347 }
348348
349349 //
@@ -1323,7 +1323,7 @@ am_hal_uart_interrupt_disable(void *pHandle, uint32_t ui32IntMask)
13231323uint32_t
13241324am_hal_uart_interrupt_clear (void * pHandle , uint32_t ui32IntMask )
13251325{
1326- am_hal_uart_state_t * pState = (am_hal_uart_state_t * )pHandle ;
1326+ am_hal_uart_state_t * pState = (am_hal_uart_state_t * ) pHandle ;
13271327 uint32_t ui32Module = pState -> ui32Module ;
13281328
13291329 if (!AM_HAL_UART_CHK_HANDLE (pHandle ))
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