refactor: update dtbwalker to 0.1.3 for early qemu

Signed-off-by: YdrMaster <ydrml@hotmail.com>

Author: YdrMaster

.vscode/settings.json

@@ -6,7 +6,7 @@
     "rust.all_targets": false,
     // For Rust Analyzer plugin users:
     "rust-analyzer.cargo.target": "riscv64imac-unknown-none-elf",
-    "rust-analyzer.checkOnSave.enable": false,
+    "rust-analyzer.checkOnSave.allTargets": false,
     // Other settings
     // For clap
     "rust-analyzer.procMacro.attributes.enable": true,

Cargo.lock

@@ -11,5 +11,5 @@ riscv = "0.8"
 spin = "0.9"
 r0 = "1"
 uart_16550 = "0.2"
-dtb-walker = "0.1.1"
+dtb-walker = "0.1.3"
 qemu-exit = "3.0"

rustsbi-qemu/Cargo.toml

@@ -27,7 +27,7 @@ impl<const N: usize> Display for StringInline<N> {
 
 /// 解析设备树。
 pub(crate) fn parse(opaque: usize) -> BoardInfo {
-    use dtb_walker::{Dtb, DtbObj, Property, WalkOperation::*};
+    use dtb_walker::{Dtb, DtbObj, HeaderError as E, Property, WalkOperation::*};
     const CPUS: &[u8] = b"cpus";
     const MEMORY: &[u8] = b"memory";
     const SOC: &[u8] = b"soc";
@@ -44,7 +44,12 @@ pub(crate) fn parse(opaque: usize) -> BoardInfo {
         test: 0..0,
         clint: 0..0,
     };
-    let dtb = unsafe { Dtb::from_raw_parts(opaque as _) }.unwrap();
+    let dtb = unsafe {
+        Dtb::from_raw_parts_filtered(opaque as _, |e| {
+            matches!(e, E::Misaligned(4) | E::LastCompVersion(16))
+        })
+    }
+    .unwrap();
     ans.dtb.end += dtb.total_size();
     dtb.walk(|path, obj| match obj {
         DtbObj::SubNode { name } => {

rustsbi-qemu/src/device_tree.rs

@@ -13,4 +13,4 @@ riscv = "0.8"
 spin = "0.9"
 r0 = "1"
 uart_16550 = "0.2"
-dtb-walker = "0.1.1"
+dtb-walker = "0.1.3"

test-kernel/Cargo.toml

@@ -260,31 +260,35 @@ struct BoardInfo {
 }
 
 fn parse_smp(dtb_pa: usize) -> BoardInfo {
-    use dtb_walker::{Dtb, DtbObj, Property, WalkOperation::*};
+    use dtb_walker::{Dtb, DtbObj, HeaderError as E, Property, WalkOperation::*};
 
     let mut ans = BoardInfo { smp: 0, uart: 0 };
-    unsafe { Dtb::from_raw_parts(dtb_pa as _) }
-        .unwrap()
-        .walk(|path, obj| match obj {
-            DtbObj::SubNode { name } => {
-                if path.last().is_empty() && (name == b"cpus" || name == b"soc") {
-                    StepInto
-                } else if path.last() == b"cpus" && name.starts_with(b"cpu@") {
-                    ans.smp += 1;
-                    StepOver
-                } else if path.last() == b"soc" && name.starts_with(b"uart") {
-                    StepInto
-                } else {
-                    StepOver
-                }
+    unsafe {
+        Dtb::from_raw_parts_filtered(dtb_pa as _, |e| {
+            matches!(e, E::Misaligned(4) | E::LastCompVersion(16))
+        })
+    }
+    .unwrap()
+    .walk(|path, obj| match obj {
+        DtbObj::SubNode { name } => {
+            if path.last().is_empty() && (name == b"cpus" || name == b"soc") {
+                StepInto
+            } else if path.last() == b"cpus" && name.starts_with(b"cpu@") {
+                ans.smp += 1;
+                StepOver
+            } else if path.last() == b"soc" && name.starts_with(b"uart") {
+                StepInto
+            } else {
+                StepOver
             }
-            DtbObj::Property(Property::Reg(mut reg)) => {
-                if path.last().starts_with(b"uart") {
-                    ans.uart = reg.next().unwrap().start;
-                }
-                StepOut
+        }
+        DtbObj::Property(Property::Reg(mut reg)) => {
+            if path.last().starts_with(b"uart") {
+                ans.uart = reg.next().unwrap().start;
             }
-            DtbObj::Property(_) => StepOver,
-        });
+            StepOut
+        }
+        DtbObj::Property(_) => StepOver,
+    });
     ans
 }