Merge pull request #129 from AntoineSebert/master

Add `#[inline]` attribute to small functions

Author: phil-opp

src/addr.rs

@@ -69,6 +69,7 @@ impl VirtAddr {
     /// This function performs sign extension of bit 47 to make the address canonical, so
     /// bits 48 to 64 are overwritten. If you want to check that these bits contain no data,
     /// use `new` or `try_new`.
+    #[inline]
     pub const fn new_unchecked(addr: u64) -> VirtAddr {
         // Rust doesn't accept shift operators in const functions at the moment,
         // so we use a multiplication and division by 0x1_0000 instead of `<< 16` and `>> 16`.
@@ -78,11 +79,13 @@ impl VirtAddr {
     }
 
     /// Creates a virtual address that points to `0`.
+    #[inline]
     pub const fn zero() -> VirtAddr {
         VirtAddr(0)
     }
 
     /// Converts the address to an `u64`.
+    #[inline]
     pub const fn as_u64(self) -> u64 {
         self.0
     }
@@ -93,25 +96,29 @@ impl VirtAddr {
     // on this function. At least for 32- and 64-bit we know the `as u64` cast
     // doesn't truncate.
     #[cfg(any(target_pointer_width = "32", target_pointer_width = "64"))]
+    #[inline]
     pub fn from_ptr<T>(ptr: *const T) -> Self {
         Self::new(ptr as u64)
     }
 
     /// Converts the address to a raw pointer.
     #[cfg(target_pointer_width = "64")]
+    #[inline]
     pub fn as_ptr<T>(self) -> *const T {
         self.as_u64() as *const T
     }
 
     /// Converts the address to a mutable raw pointer.
     #[cfg(target_pointer_width = "64")]
+    #[inline]
     pub fn as_mut_ptr<T>(self) -> *mut T {
         self.as_ptr::<T>() as *mut T
     }
 
     /// Aligns the virtual address upwards to the given alignment.
     ///
     /// See the `align_up` function for more information.
+    #[inline]
     pub fn align_up<U>(self, align: U) -> Self
     where
         U: Into<u64>,
@@ -122,6 +129,7 @@ impl VirtAddr {
     /// Aligns the virtual address downwards to the given alignment.
     ///
     /// See the `align_down` function for more information.
+    #[inline]
     pub fn align_down<U>(self, align: U) -> Self
     where
         U: Into<u64>,
@@ -130,6 +138,7 @@ impl VirtAddr {
     }
 
     /// Checks whether the virtual address has the demanded alignment.
+    #[inline]
     pub fn is_aligned<U>(self, align: U) -> bool
     where
         U: Into<u64>,
@@ -138,26 +147,31 @@ impl VirtAddr {
     }
 
     /// Returns the 12-bit page offset of this virtual address.
+    #[inline]
     pub fn page_offset(&self) -> PageOffset {
         PageOffset::new_truncate(self.0 as u16)
     }
 
     /// Returns the 9-bit level 1 page table index.
+    #[inline]
     pub fn p1_index(&self) -> PageTableIndex {
         PageTableIndex::new_truncate((self.0 >> 12) as u16)
     }
 
     /// Returns the 9-bit level 2 page table index.
+    #[inline]
     pub fn p2_index(&self) -> PageTableIndex {
         PageTableIndex::new_truncate((self.0 >> 12 >> 9) as u16)
     }
 
     /// Returns the 9-bit level 3 page table index.
+    #[inline]
     pub fn p3_index(&self) -> PageTableIndex {
         PageTableIndex::new_truncate((self.0 >> 12 >> 9 >> 9) as u16)
     }
 
     /// Returns the 9-bit level 4 page table index.
+    #[inline]
     pub fn p4_index(&self) -> PageTableIndex {
         PageTableIndex::new_truncate((self.0 >> 12 >> 9 >> 9 >> 9) as u16)
     }
@@ -252,6 +266,7 @@ impl PhysAddr {
     }
 
     /// Creates a new physical address, throwing bits 52..64 away.
+    #[inline]
     pub const fn new_truncate(addr: u64) -> PhysAddr {
         PhysAddr(addr % (1 << 52))
     }
@@ -267,18 +282,21 @@ impl PhysAddr {
     }
 
     /// Converts the address to an `u64`.
+    #[inline]
     pub fn as_u64(self) -> u64 {
         self.0
     }
 
     /// Convenience method for checking if a physical address is null.
+    #[inline]
     pub fn is_null(&self) -> bool {
         self.0 == 0
     }
 
     /// Aligns the physical address upwards to the given alignment.
     ///
     /// See the `align_up` function for more information.
+    #[inline]
     pub fn align_up<U>(self, align: U) -> Self
     where
         U: Into<u64>,
@@ -289,6 +307,7 @@ impl PhysAddr {
     /// Aligns the physical address downwards to the given alignment.
     ///
     /// See the `align_down` function for more information.
+    #[inline]
     pub fn align_down<U>(self, align: U) -> Self
     where
         U: Into<u64>,
@@ -297,6 +316,7 @@ impl PhysAddr {
     }
 
     /// Checks whether the physical address has the demanded alignment.
+    #[inline]
     pub fn is_aligned<U>(self, align: U) -> bool
     where
         U: Into<u64>,
@@ -402,6 +422,7 @@ impl Sub<PhysAddr> for PhysAddr {
 ///
 /// Returns the greatest x with alignment `align` so that x <= addr. The alignment must be
 ///  a power of 2.
+#[inline]
 pub fn align_down(addr: u64, align: u64) -> u64 {
     assert!(align.is_power_of_two(), "`align` must be a power of two");
     addr & !(align - 1)

src/instructions/interrupts.rs

@@ -1,6 +1,7 @@
 //! Enabling and disabling interrupts
 
 /// Returns whether interrupts are enabled.
+#[inline]
 pub fn are_enabled() -> bool {
     use crate::registers::rflags::{self, RFlags};
 
@@ -58,6 +59,7 @@ pub fn disable() {
 /// });
 /// // interrupts are enabled again
 /// ```
+#[inline]
 pub fn without_interrupts<F, R>(f: F) -> R
 where
     F: FnOnce() -> R,

src/instructions/segmentation.rs

@@ -89,6 +89,7 @@ pub unsafe fn swap_gs() {
 }
 
 /// Returns the current value of the code segment register.
+#[inline]
 pub fn cs() -> SegmentSelector {
     #[cfg(feature = "inline_asm")]
     {

src/lib.rs

@@ -56,6 +56,7 @@ impl PrivilegeLevel {
     /// Creates a `PrivilegeLevel` from a numeric value. The value must be in the range 0..4.
     ///
     /// This function panics if the passed value is >3.
+    #[inline]
     pub fn from_u16(value: u16) -> PrivilegeLevel {
         match value {
             0 => PrivilegeLevel::Ring0,

src/registers/control.rs

@@ -133,11 +133,13 @@ mod x86_64 {
 
     impl Cr0 {
         /// Read the current set of CR0 flags.
+        #[inline]
         pub fn read() -> Cr0Flags {
             Cr0Flags::from_bits_truncate(Self::read_raw())
         }
 
         /// Read the current raw CR0 value.
+        #[inline]
         pub fn read_raw() -> u64 {
             let value: u64;
 
@@ -158,6 +160,7 @@ mod x86_64 {
         ///
         /// Preserves the value of reserved fields. Unsafe because it's possible to violate memory
         /// safety by e.g. disabling paging.
+        #[inline]
         pub unsafe fn write(flags: Cr0Flags) {
             let old_value = Self::read_raw();
             let reserved = old_value & !(Cr0Flags::all().bits());
@@ -170,6 +173,7 @@ mod x86_64 {
         ///
         /// Does _not_ preserve any values, including reserved fields. Unsafe because it's possible to violate memory
         /// safety by e.g. disabling paging.
+        #[inline]
         pub unsafe fn write_raw(value: u64) {
             #[cfg(feature = "inline_asm")]
             asm!("mov $0, %cr0" :: "r" (value) : "memory");
@@ -182,6 +186,7 @@ mod x86_64 {
         ///
         /// Preserves the value of reserved fields. Unsafe because it's possible to violate memory
         /// safety by e.g. disabling paging.
+        #[inline]
         pub unsafe fn update<F>(f: F)
         where
             F: FnOnce(&mut Cr0Flags),
@@ -194,6 +199,7 @@ mod x86_64 {
 
     impl Cr2 {
         /// Read the current page fault linear address from the CR3 register.
+        #[inline]
         pub fn read() -> VirtAddr {
             let value: u64;
 
@@ -237,6 +243,7 @@ mod x86_64 {
         /// ## Safety
         /// Changing the level 4 page table is unsafe, because it's possible to violate memory safety by
         /// changing the page mapping.
+        #[inline]
         pub unsafe fn write(frame: PhysFrame, flags: Cr3Flags) {
             let addr = frame.start_address();
             let value = addr.as_u64() | flags.bits();
@@ -251,11 +258,13 @@ mod x86_64 {
 
     impl Cr4 {
         /// Read the current set of CR4 flags.
+        #[inline]
         pub fn read() -> Cr4Flags {
             Cr4Flags::from_bits_truncate(Self::read_raw())
         }
 
         /// Read the current raw CR4 value.
+        #[inline]
         pub fn read_raw() -> u64 {
             let value: u64;
 
@@ -276,6 +285,7 @@ mod x86_64 {
         ///
         /// Preserves the value of reserved fields. Unsafe because it's possible to violate memory
         /// safety by e.g. physical address extension.
+        #[inline]
         pub unsafe fn write(flags: Cr4Flags) {
             let old_value = Self::read_raw();
             let reserved = old_value & !(Cr4Flags::all().bits());
@@ -288,6 +298,7 @@ mod x86_64 {
         ///
         /// Does _not_ preserve any values, including reserved fields. Unsafe because it's possible to violate memory
         /// safety by e.g. physical address extension.
+        #[inline]
         pub unsafe fn write_raw(value: u64) {
             #[cfg(feature = "inline_asm")]
             asm!("mov $0, %cr4" :: "r" (value) : "memory");
@@ -300,6 +311,7 @@ mod x86_64 {
         ///
         /// Preserves the value of reserved fields. Unsafe because it's possible to violate memory
         /// safety by e.g. physical address extension.
+        #[inline]
         pub unsafe fn update<F>(f: F)
         where
             F: FnOnce(&mut Cr4Flags),