escape intrinsics

Author: Licenser

crates/core_arch/src/arm/neon/mod.rs

@@ -1161,7 +1161,7 @@ pub unsafe fn vtbx4_p8(a: poly8x8_t, b: poly8x8x4_t, c: uint8x8_t) -> poly8x8_t
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[rustc_args_required_const(1)]
-#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmov.32, imm5 = 1))]
+#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov.32", imm5 = 1))]
 #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mov, imm5 = 1))]
 // Based on the discussioj in https://github.com/rust-lang/stdarch/pull/792
 // `mov` seems to be an acceptable intrinsic to compile to
@@ -1179,7 +1179,7 @@ pub unsafe fn vgetq_lane_u64(v: uint64x2_t, imm5: i32) -> u64 {
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[rustc_args_required_const(1)]
-#[cfg_attr(test, assert_instr(vmov.32, imm5 = 0))]
+#[cfg_attr(test, assert_instr("vmov.32", imm5 = 0))]
 // FIXME: no 32bit this seems to be turned into two vmov.32 instructions
 // validate correctness
 pub unsafe fn vget_lane_u64(v: uint64x1_t, imm5: i32) -> u64 {
@@ -1194,7 +1194,7 @@ pub unsafe fn vget_lane_u64(v: uint64x1_t, imm5: i32) -> u64 {
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[rustc_args_required_const(1)]
-#[cfg_attr(test, assert_instr(vmov.u16, imm5 = 0))]
+#[cfg_attr(test, assert_instr("vmov.u16", imm5 = 0))]
 pub unsafe fn vgetq_lane_u16(v: uint16x8_t, imm5: i32) -> u16 {
     if (imm5) < 0 || (imm5) > 7 {
         unreachable_unchecked()
@@ -1208,7 +1208,7 @@ pub unsafe fn vgetq_lane_u16(v: uint16x8_t, imm5: i32) -> u16 {
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[rustc_args_required_const(1)]
-#[cfg_attr(test, assert_instr(vmov.32, imm5 = 0))]
+#[cfg_attr(test, assert_instr("vmov.32", imm5 = 0))]
 pub unsafe fn vgetq_lane_u32(v: uint32x4_t, imm5: i32) -> u32 {
     if (imm5) < 0 || (imm5) > 3 {
         unreachable_unchecked()
@@ -1222,7 +1222,7 @@ pub unsafe fn vgetq_lane_u32(v: uint32x4_t, imm5: i32) -> u32 {
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
 #[rustc_args_required_const(1)]
-#[cfg_attr(test, assert_instr(vmov.u8, imm5 = 0))]
+#[cfg_attr(test, assert_instr("vmov.u8", imm5 = 0))]
 pub unsafe fn vget_lane_u8(v: uint8x8_t, imm5: i32) -> u8 {
     if (imm5) < 0 || (imm5) > 7 {
         unreachable_unchecked()
@@ -1325,7 +1325,7 @@ pub unsafe fn vreinterpretq_u8_s8(a: int8x16_t) -> uint8x16_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(test, assert_instr(vshr.u8, imm3 = 1))]
+#[cfg_attr(test, assert_instr("vshr.u8", imm3 = 1))]
 #[rustc_args_required_const(1)]
 pub unsafe fn vshrq_n_u8(a: uint8x16_t, imm3: i32) -> uint8x16_t {
     if imm3 < 0 || imm3 > 7 {
@@ -1356,7 +1356,7 @@ pub unsafe fn vshrq_n_u8(a: uint8x16_t, imm3: i32) -> uint8x16_t {
 #[inline]
 #[target_feature(enable = "neon")]
 #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
-#[cfg_attr(test, assert_instr(vshl.s8, imm3 = 1))]
+#[cfg_attr(test, assert_instr("vshl.s8", imm3 = 1))]
 #[rustc_args_required_const(1)]
 pub unsafe fn vshlq_n_u8(a: uint8x16_t, imm3: i32) -> uint8x16_t {
     if imm3 < 0 || imm3 > 7 {