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scottmcmscottmcm
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Use an ugly name to help catch field projection
1 parent c75d8da commit 84e1f0d

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7 files changed

+44
-35
lines changed

7 files changed

+44
-35
lines changed

‎crates/core_arch/src/macros.rs‎

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -87,7 +87,7 @@ macro_rules! types {
8787
#[allow(non_camel_case_types)]
8888
#[repr(simd)]
8989
#[allow(clippy::missing_inline_in_public_items)]
90-
pub struct $name($v [$elem_type; $len]);
90+
pub struct $name { do_not_field_project: [$elem_type; $len] }
9191

9292
impl $name {
9393
/// Using `my_simd([x; N])` seemingly fails tests,
@@ -103,7 +103,16 @@ macro_rules! types {
103103
unsafe { simd_shuffle!(one, one, [0; $len]) }
104104
}
105105

106+
/// Constructs a vector from an array of the same elements and length
107+
#[inline]
108+
$v const fn from_array(array: [$elem_type; $len]) -> Self {
109+
// Projecting into SIMD is banned, but this is technically an
110+
// `Rvalue::Aggregate`, which is not a projection.
111+
$name { do_not_field_project: array }
112+
}
113+
106114
/// Returns an array reference containing the entire SIMD vector.
115+
#[inline]
107116
$v const fn as_array(&self) -> &[$elem_type; $len] {
108117
// SAFETY: this type is just an overaligned `[T; N]` with
109118
// potential padding at the end, so pointer casting to a

‎crates/core_arch/src/x86/avx.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2391,7 +2391,7 @@ pub fn _mm256_set_epi64x(a: i64, b: i64, c: i64, d: i64) -> __m256i {
23912391
// This intrinsic has no corresponding instruction.
23922392
#[stable(feature = "simd_x86", since = "1.27.0")]
23932393
pub fn _mm256_setr_pd(a: f64, b: f64, c: f64, d: f64) -> __m256d {
2394-
__m256d([a, b, c, d])
2394+
__m256d::from_array([a, b, c, d])
23952395
}
23962396

23972397
/// Sets packed single-precision (32-bit) floating-point elements in returned
@@ -2403,7 +2403,7 @@ pub fn _mm256_setr_pd(a: f64, b: f64, c: f64, d: f64) -> __m256d {
24032403
// This intrinsic has no corresponding instruction.
24042404
#[stable(feature = "simd_x86", since = "1.27.0")]
24052405
pub fn _mm256_setr_ps(a: f32, b: f32, c: f32, d: f32, e: f32, f: f32, g: f32, h: f32) -> __m256 {
2406-
__m256([a, b, c, d, e, f, g, h])
2406+
__m256::from_array([a, b, c, d, e, f, g, h])
24072407
}
24082408

24092409
/// Sets packed 8-bit integers in returned vector with the supplied values in

‎crates/core_arch/src/x86/avx512bf16.rs‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1834,7 +1834,7 @@ mod tests {
18341834

18351835
#[simd_test(enable = "avx512bf16")]
18361836
unsafe fn test_mm512_cvtpbh_ps() {
1837-
let a = __m256bh([
1837+
let a = __m256bh::from_array([
18381838
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
18391839
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
18401840
]);
@@ -1847,7 +1847,7 @@ mod tests {
18471847

18481848
#[simd_test(enable = "avx512bf16")]
18491849
unsafe fn test_mm512_mask_cvtpbh_ps() {
1850-
let a = __m256bh([
1850+
let a = __m256bh::from_array([
18511851
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
18521852
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
18531853
]);
@@ -1864,7 +1864,7 @@ mod tests {
18641864

18651865
#[simd_test(enable = "avx512bf16")]
18661866
unsafe fn test_mm512_maskz_cvtpbh_ps() {
1867-
let a = __m256bh([
1867+
let a = __m256bh::from_array([
18681868
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
18691869
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
18701870
]);
@@ -1878,7 +1878,7 @@ mod tests {
18781878

18791879
#[simd_test(enable = "avx512bf16,avx512vl")]
18801880
unsafe fn test_mm256_cvtpbh_ps() {
1881-
let a = __m128bh([
1881+
let a = __m128bh::from_array([
18821882
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
18831883
]);
18841884
let r = _mm256_cvtpbh_ps(a);
@@ -1888,7 +1888,7 @@ mod tests {
18881888

18891889
#[simd_test(enable = "avx512bf16,avx512vl")]
18901890
unsafe fn test_mm256_mask_cvtpbh_ps() {
1891-
let a = __m128bh([
1891+
let a = __m128bh::from_array([
18921892
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
18931893
]);
18941894
let src = _mm256_setr_ps(9., 10., 11., 12., 13., 14., 15., 16.);
@@ -1900,7 +1900,7 @@ mod tests {
19001900

19011901
#[simd_test(enable = "avx512bf16,avx512vl")]
19021902
unsafe fn test_mm256_maskz_cvtpbh_ps() {
1903-
let a = __m128bh([
1903+
let a = __m128bh::from_array([
19041904
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
19051905
]);
19061906
let k = 0b1010_1010;
@@ -1911,15 +1911,15 @@ mod tests {
19111911

19121912
#[simd_test(enable = "avx512bf16,avx512vl")]
19131913
unsafe fn test_mm_cvtpbh_ps() {
1914-
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
1914+
let a = __m128bh::from_array([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
19151915
let r = _mm_cvtpbh_ps(a);
19161916
let e = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
19171917
assert_eq_m128(r, e);
19181918
}
19191919

19201920
#[simd_test(enable = "avx512bf16,avx512vl")]
19211921
unsafe fn test_mm_mask_cvtpbh_ps() {
1922-
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
1922+
let a = __m128bh::from_array([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
19231923
let src = _mm_setr_ps(9., 10., 11., 12.);
19241924
let k = 0b1010;
19251925
let r = _mm_mask_cvtpbh_ps(src, k, a);
@@ -1929,7 +1929,7 @@ mod tests {
19291929

19301930
#[simd_test(enable = "avx512bf16,avx512vl")]
19311931
unsafe fn test_mm_maskz_cvtpbh_ps() {
1932-
let a = __m128bh([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
1932+
let a = __m128bh::from_array([BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, 0, 0, 0, 0]);
19331933
let k = 0b1010;
19341934
let r = _mm_maskz_cvtpbh_ps(k, a);
19351935
let e = _mm_setr_ps(0., 2., 0., 4.);
@@ -1953,7 +1953,7 @@ mod tests {
19531953
#[simd_test(enable = "avx512bf16,avx512vl")]
19541954
unsafe fn test_mm_mask_cvtneps_pbh() {
19551955
let a = _mm_setr_ps(1.0, 2.0, 3.0, 4.0);
1956-
let src = __m128bh([5, 6, 7, 8, !0, !0, !0, !0]);
1956+
let src = __m128bh::from_array([5, 6, 7, 8, !0, !0, !0, !0]);
19571957
let k = 0b1010;
19581958
let r: u16x4 = transmute_copy(&_mm_mask_cvtneps_pbh(src, k, a));
19591959
let e = u16x4::new(5, BF16_TWO, 7, BF16_FOUR);

‎crates/core_arch/src/x86/avx512fp16.rs‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ pub fn _mm_set_ph(
1919
e1: f16,
2020
e0: f16,
2121
) -> __m128h {
22-
__m128h([e0, e1, e2, e3, e4, e5, e6, e7])
22+
__m128h::from_array([e0, e1, e2, e3, e4, e5, e6, e7])
2323
}
2424

2525
/// Set packed half-precision (16-bit) floating-point elements in dst with the supplied values.
@@ -46,7 +46,7 @@ pub fn _mm256_set_ph(
4646
e1: f16,
4747
e0: f16,
4848
) -> __m256h {
49-
__m256h([
49+
__m256h::from_array([
5050
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15,
5151
])
5252
}
@@ -91,7 +91,7 @@ pub fn _mm512_set_ph(
9191
e1: f16,
9292
e0: f16,
9393
) -> __m512h {
94-
__m512h([
94+
__m512h::from_array([
9595
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15, e16, e17, e18, e19,
9696
e20, e21, e22, e23, e24, e25, e26, e27, e28, e29, e30, e31,
9797
])
@@ -105,7 +105,7 @@ pub fn _mm512_set_ph(
105105
#[target_feature(enable = "avx512fp16")]
106106
#[unstable(feature = "stdarch_x86_avx512_f16", issue = "127213")]
107107
pub fn _mm_set_sh(a: f16) -> __m128h {
108-
__m128h([a, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
108+
__m128h::from_array([a, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
109109
}
110110

111111
/// Broadcast the half-precision (16-bit) floating-point value a to all elements of dst.
@@ -154,7 +154,7 @@ pub fn _mm_setr_ph(
154154
e6: f16,
155155
e7: f16,
156156
) -> __m128h {
157-
__m128h([e0, e1, e2, e3, e4, e5, e6, e7])
157+
__m128h::from_array([e0, e1, e2, e3, e4, e5, e6, e7])
158158
}
159159

160160
/// Set packed half-precision (16-bit) floating-point elements in dst with the supplied values in reverse order.
@@ -181,7 +181,7 @@ pub fn _mm256_setr_ph(
181181
e14: f16,
182182
e15: f16,
183183
) -> __m256h {
184-
__m256h([
184+
__m256h::from_array([
185185
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15,
186186
])
187187
}
@@ -226,7 +226,7 @@ pub fn _mm512_setr_ph(
226226
e30: f16,
227227
e31: f16,
228228
) -> __m512h {
229-
__m512h([
229+
__m512h::from_array([
230230
e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15, e16, e17, e18, e19,
231231
e20, e21, e22, e23, e24, e25, e26, e27, e28, e29, e30, e31,
232232
])

‎crates/core_arch/src/x86/avxneconvert.rs‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -275,7 +275,7 @@ mod tests {
275275

276276
#[simd_test(enable = "avxneconvert")]
277277
unsafe fn test_mm_cvtneebf16_ps() {
278-
let a = __m128bh([
278+
let a = __m128bh::from_array([
279279
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
280280
]);
281281
let r = _mm_cvtneebf16_ps(addr_of!(a));
@@ -285,7 +285,7 @@ mod tests {
285285

286286
#[simd_test(enable = "avxneconvert")]
287287
unsafe fn test_mm256_cvtneebf16_ps() {
288-
let a = __m256bh([
288+
let a = __m256bh::from_array([
289289
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
290290
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
291291
]);
@@ -296,15 +296,15 @@ mod tests {
296296

297297
#[simd_test(enable = "avxneconvert")]
298298
unsafe fn test_mm_cvtneeph_ps() {
299-
let a = __m128h([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
299+
let a = __m128h::from_array([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
300300
let r = _mm_cvtneeph_ps(addr_of!(a));
301301
let e = _mm_setr_ps(1., 3., 5., 7.);
302302
assert_eq_m128(r, e);
303303
}
304304

305305
#[simd_test(enable = "avxneconvert")]
306306
unsafe fn test_mm256_cvtneeph_ps() {
307-
let a = __m256h([
307+
let a = __m256h::from_array([
308308
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
309309
]);
310310
let r = _mm256_cvtneeph_ps(addr_of!(a));
@@ -314,7 +314,7 @@ mod tests {
314314

315315
#[simd_test(enable = "avxneconvert")]
316316
unsafe fn test_mm_cvtneobf16_ps() {
317-
let a = __m128bh([
317+
let a = __m128bh::from_array([
318318
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
319319
]);
320320
let r = _mm_cvtneobf16_ps(addr_of!(a));
@@ -324,7 +324,7 @@ mod tests {
324324

325325
#[simd_test(enable = "avxneconvert")]
326326
unsafe fn test_mm256_cvtneobf16_ps() {
327-
let a = __m256bh([
327+
let a = __m256bh::from_array([
328328
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
329329
BF16_ONE, BF16_TWO, BF16_THREE, BF16_FOUR, BF16_FIVE, BF16_SIX, BF16_SEVEN, BF16_EIGHT,
330330
]);
@@ -335,15 +335,15 @@ mod tests {
335335

336336
#[simd_test(enable = "avxneconvert")]
337337
unsafe fn test_mm_cvtneoph_ps() {
338-
let a = __m128h([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
338+
let a = __m128h::from_array([1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0]);
339339
let r = _mm_cvtneoph_ps(addr_of!(a));
340340
let e = _mm_setr_ps(2., 4., 6., 8.);
341341
assert_eq_m128(r, e);
342342
}
343343

344344
#[simd_test(enable = "avxneconvert")]
345345
unsafe fn test_mm256_cvtneoph_ps() {
346-
let a = __m256h([
346+
let a = __m256h::from_array([
347347
1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 10.0, 11.0, 12.0, 13.0, 14.0, 15.0, 16.0,
348348
]);
349349
let r = _mm256_cvtneoph_ps(addr_of!(a));

‎crates/core_arch/src/x86/sse.rs‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -905,7 +905,7 @@ pub fn _mm_cvt_si2ss(a: __m128, b: i32) -> __m128 {
905905
#[cfg_attr(test, assert_instr(movss))]
906906
#[stable(feature = "simd_x86", since = "1.27.0")]
907907
pub fn _mm_set_ss(a: f32) -> __m128 {
908-
__m128([a, 0.0, 0.0, 0.0])
908+
__m128::from_array([a, 0.0, 0.0, 0.0])
909909
}
910910

911911
/// Construct a `__m128` with all element set to `a`.
@@ -916,7 +916,7 @@ pub fn _mm_set_ss(a: f32) -> __m128 {
916916
#[cfg_attr(test, assert_instr(shufps))]
917917
#[stable(feature = "simd_x86", since = "1.27.0")]
918918
pub fn _mm_set1_ps(a: f32) -> __m128 {
919-
__m128([a, a, a, a])
919+
__m128::from_array([a, a, a, a])
920920
}
921921

922922
/// Alias for [`_mm_set1_ps`](fn._mm_set1_ps.html)
@@ -954,7 +954,7 @@ pub fn _mm_set_ps1(a: f32) -> __m128 {
954954
#[cfg_attr(test, assert_instr(unpcklps))]
955955
#[stable(feature = "simd_x86", since = "1.27.0")]
956956
pub fn _mm_set_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
957-
__m128([d, c, b, a])
957+
__m128::from_array([d, c, b, a])
958958
}
959959

960960
/// Construct a `__m128` from four floating point values lowest to highest.
@@ -980,7 +980,7 @@ pub fn _mm_set_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
980980
)]
981981
#[stable(feature = "simd_x86", since = "1.27.0")]
982982
pub fn _mm_setr_ps(a: f32, b: f32, c: f32, d: f32) -> __m128 {
983-
__m128([a, b, c, d])
983+
__m128::from_array([a, b, c, d])
984984
}
985985

986986
/// Construct a `__m128` with all elements initialized to zero.
@@ -1116,7 +1116,7 @@ pub fn _mm_movemask_ps(a: __m128) -> i32 {
11161116
#[cfg_attr(test, assert_instr(movss))]
11171117
#[stable(feature = "simd_x86", since = "1.27.0")]
11181118
pub unsafe fn _mm_load_ss(p: *const f32) -> __m128 {
1119-
__m128([*p, 0.0, 0.0, 0.0])
1119+
__m128::from_array([*p, 0.0, 0.0, 0.0])
11201120
}
11211121

11221122
/// Construct a `__m128` by duplicating the value read from `p` into all
@@ -1132,7 +1132,7 @@ pub unsafe fn _mm_load_ss(p: *const f32) -> __m128 {
11321132
#[stable(feature = "simd_x86", since = "1.27.0")]
11331133
pub unsafe fn _mm_load1_ps(p: *const f32) -> __m128 {
11341134
let a = *p;
1135-
__m128([a, a, a, a])
1135+
__m128::from_array([a, a, a, a])
11361136
}
11371137

11381138
/// Alias for [`_mm_load1_ps`](fn._mm_load1_ps.html)

‎crates/core_arch/src/x86/sse2.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2497,7 +2497,7 @@ pub fn _mm_set_pd1(a: f64) -> __m128d {
24972497
#[target_feature(enable = "sse2")]
24982498
#[stable(feature = "simd_x86", since = "1.27.0")]
24992499
pub fn _mm_set_pd(a: f64, b: f64) -> __m128d {
2500-
__m128d([b, a])
2500+
__m128d::from_array([b, a])
25012501
}
25022502

25032503
/// Sets packed double-precision (64-bit) floating-point elements in the return

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