Make abm, bmi1, bmi2, bswap and tbm functions const

Author: sayantn

crates/core_arch/src/x86/abm.rs

@@ -29,7 +29,8 @@ use stdarch_test::assert_instr;
 #[target_feature(enable = "lzcnt")]
 #[cfg_attr(test, assert_instr(lzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _lzcnt_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _lzcnt_u32(x: u32) -> u32 {
     x.leading_zeros()
 }
 
@@ -40,7 +41,8 @@ pub fn _lzcnt_u32(x: u32) -> u32 {
 #[target_feature(enable = "popcnt")]
 #[cfg_attr(test, assert_instr(popcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _popcnt32(x: i32) -> i32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _popcnt32(x: i32) -> i32 {
     x.count_ones() as i32
 }
 

crates/core_arch/src/x86/bmi1.rs

@@ -46,7 +46,8 @@ pub fn _bextr2_u32(a: u32, control: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(andn))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _andn_u32(a: u32, b: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _andn_u32(a: u32, b: u32) -> u32 {
     !a & b
 }
 
@@ -57,7 +58,8 @@ pub fn _andn_u32(a: u32, b: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsi))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsi_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _blsi_u32(x: u32) -> u32 {
     x & x.wrapping_neg()
 }
 
@@ -68,7 +70,8 @@ pub fn _blsi_u32(x: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsmsk))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsmsk_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _blsmsk_u32(x: u32) -> u32 {
     x ^ (x.wrapping_sub(1_u32))
 }
 
@@ -81,7 +84,8 @@ pub fn _blsmsk_u32(x: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(blsr))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsr_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _blsr_u32(x: u32) -> u32 {
     x & (x.wrapping_sub(1))
 }
 
@@ -94,7 +98,8 @@ pub fn _blsr_u32(x: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 #[stable(feature = "simd_x86_updates", since = "1.82.0")]
-pub fn _tzcnt_u16(x: u16) -> u16 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _tzcnt_u16(x: u16) -> u16 {
     x.trailing_zeros() as u16
 }
 
@@ -107,7 +112,8 @@ pub fn _tzcnt_u16(x: u16) -> u16 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _tzcnt_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _tzcnt_u32(x: u32) -> u32 {
     x.trailing_zeros()
 }
 
@@ -120,7 +126,8 @@ pub fn _tzcnt_u32(x: u32) -> u32 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _mm_tzcnt_32(x: u32) -> i32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _mm_tzcnt_32(x: u32) -> i32 {
     x.trailing_zeros() as i32
 }
 

crates/core_arch/src/x86/bmi2.rs

@@ -25,7 +25,8 @@ use stdarch_test::assert_instr;
 #[cfg_attr(all(test, target_arch = "x86"), assert_instr(mul))]
 #[target_feature(enable = "bmi2")]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _mulx_u32(a: u32, b: u32, hi: &mut u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _mulx_u32(a: u32, b: u32, hi: &mut u32) -> u32 {
     let result: u64 = (a as u64) * (b as u64);
     *hi = (result >> 32) as u32;
     result as u32

crates/core_arch/src/x86/bswap.rs

@@ -10,7 +10,8 @@ use stdarch_test::assert_instr;
 #[inline]
 #[cfg_attr(test, assert_instr(bswap))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _bswap(x: i32) -> i32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _bswap(x: i32) -> i32 {
     x.swap_bytes()
 }
 

crates/core_arch/src/x86/tbm.rs

@@ -42,7 +42,8 @@ pub unsafe fn _bextri_u32<const CONTROL: u32>(a: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcfill))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blcfill_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blcfill_u32(x: u32) -> u32 {
     x & (x.wrapping_add(1))
 }
 
@@ -53,7 +54,8 @@ pub unsafe fn _blcfill_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blci))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blci_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blci_u32(x: u32) -> u32 {
     x | !x.wrapping_add(1)
 }
 
@@ -64,7 +66,8 @@ pub unsafe fn _blci_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcic))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blcic_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blcic_u32(x: u32) -> u32 {
     !x & x.wrapping_add(1)
 }
 
@@ -76,7 +79,8 @@ pub unsafe fn _blcic_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcmsk))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blcmsk_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blcmsk_u32(x: u32) -> u32 {
     x ^ x.wrapping_add(1)
 }
 
@@ -87,7 +91,8 @@ pub unsafe fn _blcmsk_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcs))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blcs_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blcs_u32(x: u32) -> u32 {
     x | x.wrapping_add(1)
 }
 
@@ -98,7 +103,8 @@ pub unsafe fn _blcs_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blsfill))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blsfill_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blsfill_u32(x: u32) -> u32 {
     x | x.wrapping_sub(1)
 }
 
@@ -109,7 +115,8 @@ pub unsafe fn _blsfill_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blsic))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blsic_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blsic_u32(x: u32) -> u32 {
     !x | x.wrapping_sub(1)
 }
 
@@ -121,7 +128,8 @@ pub unsafe fn _blsic_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(t1mskc))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _t1mskc_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _t1mskc_u32(x: u32) -> u32 {
     !x | x.wrapping_add(1)
 }
 
@@ -133,7 +141,8 @@ pub unsafe fn _t1mskc_u32(x: u32) -> u32 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(tzmsk))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _tzmsk_u32(x: u32) -> u32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _tzmsk_u32(x: u32) -> u32 {
     !x & x.wrapping_sub(1)
 }
 

crates/core_arch/src/x86_64/abm.rs

@@ -29,7 +29,8 @@ use stdarch_test::assert_instr;
 #[target_feature(enable = "lzcnt")]
 #[cfg_attr(test, assert_instr(lzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _lzcnt_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _lzcnt_u64(x: u64) -> u64 {
     x.leading_zeros() as u64
 }
 
@@ -40,7 +41,8 @@ pub fn _lzcnt_u64(x: u64) -> u64 {
 #[target_feature(enable = "popcnt")]
 #[cfg_attr(test, assert_instr(popcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _popcnt64(x: i64) -> i32 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _popcnt64(x: i64) -> i32 {
     x.count_ones() as i32
 }
 

crates/core_arch/src/x86_64/bmi.rs

@@ -48,7 +48,8 @@ pub fn _bextr2_u64(a: u64, control: u64) -> u64 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(andn))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _andn_u64(a: u64, b: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _andn_u64(a: u64, b: u64) -> u64 {
     !a & b
 }
 
@@ -60,7 +61,8 @@ pub fn _andn_u64(a: u64, b: u64) -> u64 {
 #[cfg_attr(test, assert_instr(blsi))]
 #[cfg(not(target_arch = "x86"))] // generates lots of instructions
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsi_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _blsi_u64(x: u64) -> u64 {
     x & x.wrapping_neg()
 }
 
@@ -72,7 +74,8 @@ pub fn _blsi_u64(x: u64) -> u64 {
 #[cfg_attr(test, assert_instr(blsmsk))]
 #[cfg(not(target_arch = "x86"))] // generates lots of instructions
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsmsk_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _blsmsk_u64(x: u64) -> u64 {
     x ^ (x.wrapping_sub(1_u64))
 }
 
@@ -86,7 +89,8 @@ pub fn _blsmsk_u64(x: u64) -> u64 {
 #[cfg_attr(test, assert_instr(blsr))]
 #[cfg(not(target_arch = "x86"))] // generates lots of instructions
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _blsr_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _blsr_u64(x: u64) -> u64 {
     x & (x.wrapping_sub(1))
 }
 
@@ -99,7 +103,8 @@ pub fn _blsr_u64(x: u64) -> u64 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _tzcnt_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _tzcnt_u64(x: u64) -> u64 {
     x.trailing_zeros() as u64
 }
 
@@ -112,7 +117,8 @@ pub fn _tzcnt_u64(x: u64) -> u64 {
 #[target_feature(enable = "bmi1")]
 #[cfg_attr(test, assert_instr(tzcnt))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _mm_tzcnt_64(x: u64) -> i64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _mm_tzcnt_64(x: u64) -> i64 {
     x.trailing_zeros() as i64
 }
 

crates/core_arch/src/x86_64/bmi2.rs

@@ -24,7 +24,8 @@ use stdarch_test::assert_instr;
 #[target_feature(enable = "bmi2")]
 #[cfg(not(target_arch = "x86"))] // calls an intrinsic
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub fn _mulx_u64(a: u64, b: u64, hi: &mut u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const fn _mulx_u64(a: u64, b: u64, hi: &mut u64) -> u64 {
     let result: u128 = (a as u128) * (b as u128);
     *hi = (result >> 64) as u64;
     result as u64

crates/core_arch/src/x86_64/bswap.rs

@@ -11,7 +11,8 @@ use stdarch_test::assert_instr;
 #[inline]
 #[cfg_attr(test, assert_instr(bswap))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _bswap64(x: i64) -> i64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _bswap64(x: i64) -> i64 {
     x.swap_bytes()
 }
 

crates/core_arch/src/x86_64/tbm.rs

@@ -42,7 +42,8 @@ pub unsafe fn _bextri_u64<const CONTROL: u64>(a: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcfill))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blcfill_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blcfill_u64(x: u64) -> u64 {
     x & x.wrapping_add(1)
 }
 
@@ -53,7 +54,8 @@ pub unsafe fn _blcfill_u64(x: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blci))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blci_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blci_u64(x: u64) -> u64 {
     x | !x.wrapping_add(1)
 }
 
@@ -64,7 +66,8 @@ pub unsafe fn _blci_u64(x: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcic))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blcic_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blcic_u64(x: u64) -> u64 {
     !x & x.wrapping_add(1)
 }
 
@@ -76,7 +79,8 @@ pub unsafe fn _blcic_u64(x: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcmsk))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blcmsk_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blcmsk_u64(x: u64) -> u64 {
     x ^ x.wrapping_add(1)
 }
 
@@ -87,7 +91,8 @@ pub unsafe fn _blcmsk_u64(x: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blcs))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blcs_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blcs_u64(x: u64) -> u64 {
     x | x.wrapping_add(1)
 }
 
@@ -98,7 +103,8 @@ pub unsafe fn _blcs_u64(x: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blsfill))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blsfill_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blsfill_u64(x: u64) -> u64 {
     x | x.wrapping_sub(1)
 }
 
@@ -109,7 +115,8 @@ pub unsafe fn _blsfill_u64(x: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(blsic))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _blsic_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _blsic_u64(x: u64) -> u64 {
     !x | x.wrapping_sub(1)
 }
 
@@ -121,7 +128,8 @@ pub unsafe fn _blsic_u64(x: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(t1mskc))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _t1mskc_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _t1mskc_u64(x: u64) -> u64 {
     !x | x.wrapping_add(1)
 }
 
@@ -133,7 +141,8 @@ pub unsafe fn _t1mskc_u64(x: u64) -> u64 {
 #[target_feature(enable = "tbm")]
 #[cfg_attr(test, assert_instr(tzmsk))]
 #[stable(feature = "simd_x86", since = "1.27.0")]
-pub unsafe fn _tzmsk_u64(x: u64) -> u64 {
+#[rustc_const_unstable(feature = "stdarch_const_intrinsics", issue = "none")]
+pub const unsafe fn _tzmsk_u64(x: u64) -> u64 {
     !x & x.wrapping_sub(1)
 }