@@ -408,6 +408,7 @@ impl_neg! { i16x8 : 0 }
408408impl_neg ! { i32x4 : 0 }
409409impl_neg ! { f32x4 : 0f32 }
410410
411+ #[ macro_use]
411412mod sealed {
412413 use super :: * ;
413414
@@ -1161,6 +1162,19 @@ mod sealed {
11611162 impl_abss ! { vec_abss_i16, i16x8 }
11621163 impl_abss ! { vec_abss_i32, i32x4 }
11631164
1165+ macro_rules! splat {
1166+ ( $name: ident, $v: ident, $r: ident [ $instr: ident, $doc: literal] ) => {
1167+ #[ doc = $doc]
1168+ #[ inline]
1169+ #[ target_feature( enable = "altivec" ) ]
1170+ #[ cfg_attr( test, assert_instr( $instr, IMM5 = 1 ) ) ]
1171+ pub unsafe fn $name<const IMM5 : i8 >( ) -> s_t_l!( $r) {
1172+ static_assert_simm_bits!( IMM5 , 5 ) ;
1173+ transmute( $r:: splat( IMM5 as $v) )
1174+ }
1175+ } ;
1176+ }
1177+
11641178 macro_rules! splats {
11651179 ( $name: ident, $v: ident, $r: ident) => {
11661180 #[ inline]
@@ -2592,6 +2606,13 @@ where
25922606 a. vec_abss ( )
25932607}
25942608
2609+ splat ! { vec_splat_u8, u8 , u8x16 [ vspltisb, "Vector Splat to Unsigned Byte" ] }
2610+ splat ! { vec_splat_i8, i8 , i8x16 [ vspltisb, "Vector Splat to Signed Byte" ] }
2611+ splat ! { vec_splat_u16, u16 , u16x8 [ vspltish, "Vector Splat to Unsigned Halfword" ] }
2612+ splat ! { vec_splat_i16, i16 , i16x8 [ vspltish, "Vector Splat to Signed Halfword" ] }
2613+ splat ! { vec_splat_u32, u32 , u32x4 [ vspltisw, "Vector Splat to Unsigned Word" ] }
2614+ splat ! { vec_splat_i32, i32 , i32x4 [ vspltisw, "Vector Splat to Signed Word" ] }
2615+
25952616/// Vector splats.
25962617#[ inline]
25972618#[ target_feature( enable = "altivec" ) ]
@@ -4361,6 +4382,24 @@ mod tests {
43614382 test_vec_splats ! { test_vec_splats_i32, i32x4, 42i32 }
43624383 test_vec_splats ! { test_vec_splats_f32, f32x4, 42f32 }
43634384
4385+ macro_rules! test_vec_splat {
4386+ { $name: ident, $fun: ident, $ty: ident, $a: expr, $b: expr} => {
4387+ #[ simd_test( enable = "altivec" ) ]
4388+ unsafe fn $name( ) {
4389+ let a = $fun:: <$a>( ) ;
4390+ let d = $ty:: splat( $b) ;
4391+ assert_eq!( d, transmute( a) ) ;
4392+ }
4393+ }
4394+ }
4395+
4396+ test_vec_splat ! { test_vec_splat_u8, vec_splat_u8, u8x16, -1 , u8 :: MAX }
4397+ test_vec_splat ! { test_vec_splat_u16, vec_splat_u16, u16x8, -1 , u16 :: MAX }
4398+ test_vec_splat ! { test_vec_splat_u32, vec_splat_u32, u32x4, -1 , u32 :: MAX }
4399+ test_vec_splat ! { test_vec_splat_i8, vec_splat_i8, i8x16, -1 , -1 }
4400+ test_vec_splat ! { test_vec_splat_i16, vec_splat_i16, i16x8, -1 , -1 }
4401+ test_vec_splat ! { test_vec_splat_i32, vec_splat_i32, i32x4, -1 , -1 }
4402+
43644403 macro_rules! test_vec_sub {
43654404 { $name: ident, $ty: ident, [ $( $a: expr) ,+] , [ $( $b: expr) ,+] , [ $( $d: expr) ,+] } => {
43664405 test_vec_2! { $name, vec_sub, $ty, [ $( $a) ,+] , [ $( $b) ,+] , [ $( $d) ,+] }
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