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sayantnAmanieu
sayantn
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Amanieu
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Re-enable all conditionally-disabled x86 assert_instr tests
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12 files changed

+101
-341
lines changed

12 files changed

+101
-341
lines changed

‎crates/core_arch/src/x86/avx.rs‎

Lines changed: 6 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -970,10 +970,7 @@ pub fn _mm256_cvttps_epi32(a: __m256) -> __m256i {
970970
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_ps)
971971
#[inline]
972972
#[target_feature(enable = "avx")]
973-
#[cfg_attr(
974-
all(test, not(target_env = "msvc")),
975-
assert_instr(vextractf128, IMM1 = 1)
976-
)]
973+
#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))]
977974
#[rustc_legacy_const_generics(1)]
978975
#[stable(feature = "simd_x86", since = "1.27.0")]
979976
pub fn _mm256_extractf128_ps<const IMM1: i32>(a: __m256) -> __m128 {
@@ -993,10 +990,7 @@ pub fn _mm256_extractf128_ps<const IMM1: i32>(a: __m256) -> __m128 {
993990
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_pd)
994991
#[inline]
995992
#[target_feature(enable = "avx")]
996-
#[cfg_attr(
997-
all(test, not(target_env = "msvc")),
998-
assert_instr(vextractf128, IMM1 = 1)
999-
)]
993+
#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))]
1000994
#[rustc_legacy_const_generics(1)]
1001995
#[stable(feature = "simd_x86", since = "1.27.0")]
1002996
pub fn _mm256_extractf128_pd<const IMM1: i32>(a: __m256d) -> __m128d {
@@ -1009,10 +1003,7 @@ pub fn _mm256_extractf128_pd<const IMM1: i32>(a: __m256d) -> __m128d {
10091003
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extractf128_si256)
10101004
#[inline]
10111005
#[target_feature(enable = "avx")]
1012-
#[cfg_attr(
1013-
all(test, not(target_env = "msvc")),
1014-
assert_instr(vextractf128, IMM1 = 1)
1015-
)]
1006+
#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))]
10161007
#[rustc_legacy_const_generics(1)]
10171008
#[stable(feature = "simd_x86", since = "1.27.0")]
10181009
pub fn _mm256_extractf128_si256<const IMM1: i32>(a: __m256i) -> __m128i {
@@ -1328,10 +1319,7 @@ pub unsafe fn _mm256_broadcast_pd(a: &__m128d) -> __m256d {
13281319
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_ps)
13291320
#[inline]
13301321
#[target_feature(enable = "avx")]
1331-
#[cfg_attr(
1332-
all(test, not(target_env = "msvc")),
1333-
assert_instr(vinsertf128, IMM1 = 1)
1334-
)]
1322+
#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))]
13351323
#[rustc_legacy_const_generics(2)]
13361324
#[stable(feature = "simd_x86", since = "1.27.0")]
13371325
pub fn _mm256_insertf128_ps<const IMM1: i32>(a: __m256, b: __m128) -> __m256 {
@@ -1352,10 +1340,7 @@ pub fn _mm256_insertf128_ps<const IMM1: i32>(a: __m256, b: __m128) -> __m256 {
13521340
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_pd)
13531341
#[inline]
13541342
#[target_feature(enable = "avx")]
1355-
#[cfg_attr(
1356-
all(test, not(target_env = "msvc")),
1357-
assert_instr(vinsertf128, IMM1 = 1)
1358-
)]
1343+
#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))]
13591344
#[rustc_legacy_const_generics(2)]
13601345
#[stable(feature = "simd_x86", since = "1.27.0")]
13611346
pub fn _mm256_insertf128_pd<const IMM1: i32>(a: __m256d, b: __m128d) -> __m256d {
@@ -1375,10 +1360,7 @@ pub fn _mm256_insertf128_pd<const IMM1: i32>(a: __m256d, b: __m128d) -> __m256d
13751360
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_insertf128_si256)
13761361
#[inline]
13771362
#[target_feature(enable = "avx")]
1378-
#[cfg_attr(
1379-
all(test, not(target_env = "msvc")),
1380-
assert_instr(vinsertf128, IMM1 = 1)
1381-
)]
1363+
#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))]
13821364
#[rustc_legacy_const_generics(2)]
13831365
#[stable(feature = "simd_x86", since = "1.27.0")]
13841366
pub fn _mm256_insertf128_si256<const IMM1: i32>(a: __m256i, b: __m128i) -> __m256i {

‎crates/core_arch/src/x86/avx2.rs‎

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -957,10 +957,7 @@ pub fn _mm256_cvtepu8_epi64(a: __m128i) -> __m256i {
957957
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_extracti128_si256)
958958
#[inline]
959959
#[target_feature(enable = "avx2")]
960-
#[cfg_attr(
961-
all(test, not(target_env = "msvc")),
962-
assert_instr(vextractf128, IMM1 = 1)
963-
)]
960+
#[cfg_attr(test, assert_instr(vextractf128, IMM1 = 1))]
964961
#[rustc_legacy_const_generics(1)]
965962
#[stable(feature = "simd_x86", since = "1.27.0")]
966963
pub fn _mm256_extracti128_si256<const IMM1: i32>(a: __m256i) -> __m128i {
@@ -1781,10 +1778,7 @@ pub unsafe fn _mm256_mask_i64gather_pd<const SCALE: i32>(
17811778
/// [Intel's documentation](https://www.intel.com/content/www/us/en/docs/intrinsics-guide/index.html#text=_mm256_inserti128_si256)
17821779
#[inline]
17831780
#[target_feature(enable = "avx2")]
1784-
#[cfg_attr(
1785-
all(test, not(target_env = "msvc")),
1786-
assert_instr(vinsertf128, IMM1 = 1)
1787-
)]
1781+
#[cfg_attr(test, assert_instr(vinsertf128, IMM1 = 1))]
17881782
#[rustc_legacy_const_generics(2)]
17891783
#[stable(feature = "simd_x86", since = "1.27.0")]
17901784
pub fn _mm256_inserti128_si256<const IMM1: i32>(a: __m256i, b: __m128i) -> __m256i {

‎crates/core_arch/src/x86/avx512f.rs‎

Lines changed: 25 additions & 79 deletions
Original file line numberDiff line numberDiff line change
@@ -24813,10 +24813,7 @@ pub fn _mm256_maskz_shuffle_f64x2<const MASK: i32>(k: __mmask8, a: __m256d, b: _
2481324813
#[inline]
2481424814
#[target_feature(enable = "avx512f")]
2481524815
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24816-
#[cfg_attr(
24817-
all(test, not(target_env = "msvc")),
24818-
assert_instr(vextractf32x4, IMM8 = 3)
24819-
)]
24816+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))]
2482024817
#[rustc_legacy_const_generics(1)]
2482124818
pub fn _mm512_extractf32x4_ps<const IMM8: i32>(a: __m512) -> __m128 {
2482224819
unsafe {
@@ -24836,10 +24833,7 @@ pub fn _mm512_extractf32x4_ps<const IMM8: i32>(a: __m512) -> __m128 {
2483624833
#[inline]
2483724834
#[target_feature(enable = "avx512f")]
2483824835
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24839-
#[cfg_attr(
24840-
all(test, not(target_env = "msvc")),
24841-
assert_instr(vextractf32x4, IMM8 = 3)
24842-
)]
24836+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))]
2484324837
#[rustc_legacy_const_generics(3)]
2484424838
pub fn _mm512_mask_extractf32x4_ps<const IMM8: i32>(src: __m128, k: __mmask8, a: __m512) -> __m128 {
2484524839
unsafe {
@@ -24855,10 +24849,7 @@ pub fn _mm512_mask_extractf32x4_ps<const IMM8: i32>(src: __m128, k: __mmask8, a:
2485524849
#[inline]
2485624850
#[target_feature(enable = "avx512f")]
2485724851
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24858-
#[cfg_attr(
24859-
all(test, not(target_env = "msvc")),
24860-
assert_instr(vextractf32x4, IMM8 = 3)
24861-
)]
24852+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 3))]
2486224853
#[rustc_legacy_const_generics(2)]
2486324854
pub fn _mm512_maskz_extractf32x4_ps<const IMM8: i32>(k: __mmask8, a: __m512) -> __m128 {
2486424855
unsafe {
@@ -24875,7 +24866,7 @@ pub fn _mm512_maskz_extractf32x4_ps<const IMM8: i32>(k: __mmask8, a: __m512) ->
2487524866
#[target_feature(enable = "avx512f,avx512vl")]
2487624867
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2487724868
#[cfg_attr(
24878-
all(test, not(target_env = "msvc")),
24869+
test,
2487924870
assert_instr(vextract, IMM8 = 1) //should be vextractf32x4
2488024871
)]
2488124872
#[rustc_legacy_const_generics(1)]
@@ -24895,10 +24886,7 @@ pub fn _mm256_extractf32x4_ps<const IMM8: i32>(a: __m256) -> __m128 {
2489524886
#[inline]
2489624887
#[target_feature(enable = "avx512f,avx512vl")]
2489724888
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24898-
#[cfg_attr(
24899-
all(test, not(target_env = "msvc")),
24900-
assert_instr(vextractf32x4, IMM8 = 1)
24901-
)]
24889+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 1))]
2490224890
#[rustc_legacy_const_generics(3)]
2490324891
pub fn _mm256_mask_extractf32x4_ps<const IMM8: i32>(src: __m128, k: __mmask8, a: __m256) -> __m128 {
2490424892
unsafe {
@@ -24914,10 +24902,7 @@ pub fn _mm256_mask_extractf32x4_ps<const IMM8: i32>(src: __m128, k: __mmask8, a:
2491424902
#[inline]
2491524903
#[target_feature(enable = "avx512f,avx512vl")]
2491624904
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24917-
#[cfg_attr(
24918-
all(test, not(target_env = "msvc")),
24919-
assert_instr(vextractf32x4, IMM8 = 1)
24920-
)]
24905+
#[cfg_attr(test, assert_instr(vextractf32x4, IMM8 = 1))]
2492124906
#[rustc_legacy_const_generics(2)]
2492224907
pub fn _mm256_maskz_extractf32x4_ps<const IMM8: i32>(k: __mmask8, a: __m256) -> __m128 {
2492324908
unsafe {
@@ -24934,7 +24919,7 @@ pub fn _mm256_maskz_extractf32x4_ps<const IMM8: i32>(k: __mmask8, a: __m256) ->
2493424919
#[target_feature(enable = "avx512f")]
2493524920
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2493624921
#[cfg_attr(
24937-
all(test, not(target_env = "msvc")),
24922+
test,
2493824923
assert_instr(vextractf64x4, IMM1 = 1) //should be vextracti64x4
2493924924
)]
2494024925
#[rustc_legacy_const_generics(1)]
@@ -24954,10 +24939,7 @@ pub fn _mm512_extracti64x4_epi64<const IMM1: i32>(a: __m512i) -> __m256i {
2495424939
#[inline]
2495524940
#[target_feature(enable = "avx512f")]
2495624941
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24957-
#[cfg_attr(
24958-
all(test, not(target_env = "msvc")),
24959-
assert_instr(vextracti64x4, IMM1 = 1)
24960-
)]
24942+
#[cfg_attr(test, assert_instr(vextracti64x4, IMM1 = 1))]
2496124943
#[rustc_legacy_const_generics(3)]
2496224944
pub fn _mm512_mask_extracti64x4_epi64<const IMM1: i32>(
2496324945
src: __m256i,
@@ -24977,10 +24959,7 @@ pub fn _mm512_mask_extracti64x4_epi64<const IMM1: i32>(
2497724959
#[inline]
2497824960
#[target_feature(enable = "avx512f")]
2497924961
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24980-
#[cfg_attr(
24981-
all(test, not(target_env = "msvc")),
24982-
assert_instr(vextracti64x4, IMM1 = 1)
24983-
)]
24962+
#[cfg_attr(test, assert_instr(vextracti64x4, IMM1 = 1))]
2498424963
#[rustc_legacy_const_generics(2)]
2498524964
pub fn _mm512_maskz_extracti64x4_epi64<const IMM1: i32>(k: __mmask8, a: __m512i) -> __m256i {
2498624965
unsafe {
@@ -24996,10 +24975,7 @@ pub fn _mm512_maskz_extracti64x4_epi64<const IMM1: i32>(k: __mmask8, a: __m512i)
2499624975
#[inline]
2499724976
#[target_feature(enable = "avx512f")]
2499824977
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
24999-
#[cfg_attr(
25000-
all(test, not(target_env = "msvc")),
25001-
assert_instr(vextractf64x4, IMM8 = 1)
25002-
)]
24978+
#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))]
2500324979
#[rustc_legacy_const_generics(1)]
2500424980
pub fn _mm512_extractf64x4_pd<const IMM8: i32>(a: __m512d) -> __m256d {
2500524981
unsafe {
@@ -25017,10 +24993,7 @@ pub fn _mm512_extractf64x4_pd<const IMM8: i32>(a: __m512d) -> __m256d {
2501724993
#[inline]
2501824994
#[target_feature(enable = "avx512f")]
2501924995
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25020-
#[cfg_attr(
25021-
all(test, not(target_env = "msvc")),
25022-
assert_instr(vextractf64x4, IMM8 = 1)
25023-
)]
24996+
#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))]
2502424997
#[rustc_legacy_const_generics(3)]
2502524998
pub fn _mm512_mask_extractf64x4_pd<const IMM8: i32>(
2502624999
src: __m256d,
@@ -25040,10 +25013,7 @@ pub fn _mm512_mask_extractf64x4_pd<const IMM8: i32>(
2504025013
#[inline]
2504125014
#[target_feature(enable = "avx512f")]
2504225015
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25043-
#[cfg_attr(
25044-
all(test, not(target_env = "msvc")),
25045-
assert_instr(vextractf64x4, IMM8 = 1)
25046-
)]
25016+
#[cfg_attr(test, assert_instr(vextractf64x4, IMM8 = 1))]
2504725017
#[rustc_legacy_const_generics(2)]
2504825018
pub fn _mm512_maskz_extractf64x4_pd<const IMM8: i32>(k: __mmask8, a: __m512d) -> __m256d {
2504925019
unsafe {
@@ -25060,7 +25030,7 @@ pub fn _mm512_maskz_extractf64x4_pd<const IMM8: i32>(k: __mmask8, a: __m512d) ->
2506025030
#[target_feature(enable = "avx512f")]
2506125031
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2506225032
#[cfg_attr(
25063-
all(test, not(target_env = "msvc")),
25033+
test,
2506425034
assert_instr(vextractf32x4, IMM2 = 3) //should be vextracti32x4
2506525035
)]
2506625036
#[rustc_legacy_const_generics(1)]
@@ -25085,10 +25055,7 @@ pub fn _mm512_extracti32x4_epi32<const IMM2: i32>(a: __m512i) -> __m128i {
2508525055
#[inline]
2508625056
#[target_feature(enable = "avx512f")]
2508725057
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25088-
#[cfg_attr(
25089-
all(test, not(target_env = "msvc")),
25090-
assert_instr(vextracti32x4, IMM2 = 3)
25091-
)]
25058+
#[cfg_attr(test, assert_instr(vextracti32x4, IMM2 = 3))]
2509225059
#[rustc_legacy_const_generics(3)]
2509325060
pub fn _mm512_mask_extracti32x4_epi32<const IMM2: i32>(
2509425061
src: __m128i,
@@ -25108,10 +25075,7 @@ pub fn _mm512_mask_extracti32x4_epi32<const IMM2: i32>(
2510825075
#[inline]
2510925076
#[target_feature(enable = "avx512f")]
2511025077
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25111-
#[cfg_attr(
25112-
all(test, not(target_env = "msvc")),
25113-
assert_instr(vextracti32x4, IMM2 = 3)
25114-
)]
25078+
#[cfg_attr(test, assert_instr(vextracti32x4, IMM2 = 3))]
2511525079
#[rustc_legacy_const_generics(2)]
2511625080
pub fn _mm512_maskz_extracti32x4_epi32<const IMM2: i32>(k: __mmask8, a: __m512i) -> __m128i {
2511725081
unsafe {
@@ -25128,7 +25092,7 @@ pub fn _mm512_maskz_extracti32x4_epi32<const IMM2: i32>(k: __mmask8, a: __m512i)
2512825092
#[target_feature(enable = "avx512f,avx512vl")]
2512925093
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2513025094
#[cfg_attr(
25131-
all(test, not(target_env = "msvc")),
25095+
test,
2513225096
assert_instr(vextract, IMM1 = 1) //should be vextracti32x4
2513325097
)]
2513425098
#[rustc_legacy_const_generics(1)]
@@ -25151,10 +25115,7 @@ pub fn _mm256_extracti32x4_epi32<const IMM1: i32>(a: __m256i) -> __m128i {
2515125115
#[inline]
2515225116
#[target_feature(enable = "avx512f,avx512vl")]
2515325117
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25154-
#[cfg_attr(
25155-
all(test, not(target_env = "msvc")),
25156-
assert_instr(vextracti32x4, IMM1 = 1)
25157-
)]
25118+
#[cfg_attr(test, assert_instr(vextracti32x4, IMM1 = 1))]
2515825119
#[rustc_legacy_const_generics(3)]
2515925120
pub fn _mm256_mask_extracti32x4_epi32<const IMM1: i32>(
2516025121
src: __m128i,
@@ -25174,10 +25135,7 @@ pub fn _mm256_mask_extracti32x4_epi32<const IMM1: i32>(
2517425135
#[inline]
2517525136
#[target_feature(enable = "avx512f,avx512vl")]
2517625137
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25177-
#[cfg_attr(
25178-
all(test, not(target_env = "msvc")),
25179-
assert_instr(vextracti32x4, IMM1 = 1)
25180-
)]
25138+
#[cfg_attr(test, assert_instr(vextracti32x4, IMM1 = 1))]
2518125139
#[rustc_legacy_const_generics(2)]
2518225140
pub fn _mm256_maskz_extracti32x4_epi32<const IMM1: i32>(k: __mmask8, a: __m256i) -> __m128i {
2518325141
unsafe {
@@ -25572,7 +25530,7 @@ pub fn _mm512_maskz_inserti32x4<const IMM8: i32>(k: __mmask16, a: __m512i, b: __
2557225530
#[target_feature(enable = "avx512f,avx512vl")]
2557325531
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2557425532
#[cfg_attr(
25575-
all(test, not(target_env = "msvc")),
25533+
test,
2557625534
assert_instr(vinsert, IMM8 = 1) //should be vinserti32x4
2557725535
)]
2557825536
#[rustc_legacy_const_generics(2)]
@@ -25595,10 +25553,7 @@ pub fn _mm256_inserti32x4<const IMM8: i32>(a: __m256i, b: __m128i) -> __m256i {
2559525553
#[inline]
2559625554
#[target_feature(enable = "avx512f,avx512vl")]
2559725555
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25598-
#[cfg_attr(
25599-
all(test, not(target_env = "msvc")),
25600-
assert_instr(vinserti32x4, IMM8 = 1)
25601-
)]
25556+
#[cfg_attr(test, assert_instr(vinserti32x4, IMM8 = 1))]
2560225557
#[rustc_legacy_const_generics(4)]
2560325558
pub fn _mm256_mask_inserti32x4<const IMM8: i32>(
2560425559
src: __m256i,
@@ -25619,10 +25574,7 @@ pub fn _mm256_mask_inserti32x4<const IMM8: i32>(
2561925574
#[inline]
2562025575
#[target_feature(enable = "avx512f,avx512vl")]
2562125576
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25622-
#[cfg_attr(
25623-
all(test, not(target_env = "msvc")),
25624-
assert_instr(vinserti32x4, IMM8 = 1)
25625-
)]
25577+
#[cfg_attr(test, assert_instr(vinserti32x4, IMM8 = 1))]
2562625578
#[rustc_legacy_const_generics(3)]
2562725579
pub fn _mm256_maskz_inserti32x4<const IMM8: i32>(k: __mmask8, a: __m256i, b: __m128i) -> __m256i {
2562825580
unsafe {
@@ -25773,7 +25725,7 @@ pub fn _mm512_maskz_insertf32x4<const IMM8: i32>(k: __mmask16, a: __m512, b: __m
2577325725
#[target_feature(enable = "avx512f,avx512vl")]
2577425726
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
2577525727
#[cfg_attr(
25776-
all(test, not(target_env = "msvc")),
25728+
test,
2577725729
assert_instr(vinsert, IMM8 = 1) //should be vinsertf32x4
2577825730
)]
2577925731
#[rustc_legacy_const_generics(2)]
@@ -25794,10 +25746,7 @@ pub fn _mm256_insertf32x4<const IMM8: i32>(a: __m256, b: __m128) -> __m256 {
2579425746
#[inline]
2579525747
#[target_feature(enable = "avx512f,avx512vl")]
2579625748
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25797-
#[cfg_attr(
25798-
all(test, not(target_env = "msvc")),
25799-
assert_instr(vinsertf32x4, IMM8 = 1)
25800-
)]
25749+
#[cfg_attr(test, assert_instr(vinsertf32x4, IMM8 = 1))]
2580125750
#[rustc_legacy_const_generics(4)]
2580225751
pub fn _mm256_mask_insertf32x4<const IMM8: i32>(
2580325752
src: __m256,
@@ -25818,10 +25767,7 @@ pub fn _mm256_mask_insertf32x4<const IMM8: i32>(
2581825767
#[inline]
2581925768
#[target_feature(enable = "avx512f,avx512vl")]
2582025769
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
25821-
#[cfg_attr(
25822-
all(test, not(target_env = "msvc")),
25823-
assert_instr(vinsertf32x4, IMM8 = 1)
25824-
)]
25770+
#[cfg_attr(test, assert_instr(vinsertf32x4, IMM8 = 1))]
2582525771
#[rustc_legacy_const_generics(3)]
2582625772
pub fn _mm256_maskz_insertf32x4<const IMM8: i32>(k: __mmask8, a: __m256, b: __m128) -> __m256 {
2582725773
unsafe {
@@ -26958,7 +26904,7 @@ pub fn _mm512_castsi512_pd(a: __m512i) -> __m512d {
2695826904
#[inline]
2695926905
#[target_feature(enable = "avx512f")]
2696026906
#[unstable(feature = "stdarch_x86_avx512", issue = "111137")]
26961-
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(vmovd))]
26907+
#[cfg_attr(test, assert_instr(vmovd))]
2696226908
pub fn _mm512_cvtsi512_si32(a: __m512i) -> i32 {
2696326909
unsafe { simd_extract!(a.as_i32x16(), 0) }
2696426910
}

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