@@ -384,6 +384,13 @@ extern "C" {
384384 fn vclzh ( a : vector_signed_short ) -> vector_signed_short ;
385385 #[ link_name = "llvm.ctlz.v4i32" ]
386386 fn vclzw ( a : vector_signed_int ) -> vector_signed_int ;
387+
388+ #[ link_name = "llvm.ppc.altivec.vrlb" ]
389+ fn vrlb ( a : vector_signed_char , b : vector_unsigned_char ) -> vector_signed_char ;
390+ #[ link_name = "llvm.ppc.altivec.vrlh" ]
391+ fn vrlh ( a : vector_signed_short , b : vector_unsigned_short ) -> vector_signed_short ;
392+ #[ link_name = "llvm.ppc.altivec.vrlw" ]
393+ fn vrlw ( a : vector_signed_int , c : vector_unsigned_int ) -> vector_signed_int ;
387394}
388395
389396macro_rules! s_t_l {
@@ -464,6 +471,27 @@ macro_rules! t_t_s {
464471 } ;
465472}
466473
474+ macro_rules! t_u {
475+ ( vector_unsigned_char) => {
476+ vector_unsigned_char
477+ } ;
478+ ( vector_unsigned_short) => {
479+ vector_unsigned_short
480+ } ;
481+ ( vector_unsigned_int) => {
482+ vector_unsigned_int
483+ } ;
484+ ( vector_signed_char) => {
485+ vector_unsigned_char
486+ } ;
487+ ( vector_signed_short) => {
488+ vector_unsigned_short
489+ } ;
490+ ( vector_signed_int) => {
491+ vector_unsigned_int
492+ } ;
493+ }
494+
467495macro_rules! impl_from {
468496 ( $s: ident) => {
469497 #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
@@ -3126,6 +3154,37 @@ mod sealed {
31263154 impl_vec_cntlz ! { vec_vcntlzh( vector_unsigned_short) }
31273155 impl_vec_cntlz ! { vec_vcntlzw( vector_signed_int) }
31283156 impl_vec_cntlz ! { vec_vcntlzw( vector_unsigned_int) }
3157+
3158+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
3159+ pub trait VectorRl {
3160+ type B ;
3161+ unsafe fn vec_rl ( self , b : Self :: B ) -> Self ;
3162+ }
3163+
3164+ macro_rules! impl_vec_rl {
3165+ ( $fun: ident ( $a: ident) ) => {
3166+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
3167+ impl VectorRl for $a {
3168+ type B = t_u!( $a) ;
3169+ #[ inline]
3170+ #[ target_feature( enable = "altivec" ) ]
3171+ unsafe fn vec_rl( self , b: Self :: B ) -> Self {
3172+ transmute( $fun( transmute( self ) , b) )
3173+ }
3174+ }
3175+ } ;
3176+ }
3177+
3178+ test_impl ! { vec_vrlb( a: vector_signed_char, b: vector_unsigned_char) -> vector_signed_char [ vrlb, vrlb] }
3179+ test_impl ! { vec_vrlh( a: vector_signed_short, b: vector_unsigned_short) -> vector_signed_short [ vrlh, vrlh] }
3180+ test_impl ! { vec_vrlw( a: vector_signed_int, b: vector_unsigned_int) -> vector_signed_int [ vrlw, vrlw] }
3181+
3182+ impl_vec_rl ! { vec_vrlb( vector_signed_char) }
3183+ impl_vec_rl ! { vec_vrlh( vector_signed_short) }
3184+ impl_vec_rl ! { vec_vrlw( vector_signed_int) }
3185+ impl_vec_rl ! { vec_vrlb( vector_unsigned_char) }
3186+ impl_vec_rl ! { vec_vrlh( vector_unsigned_short) }
3187+ impl_vec_rl ! { vec_vrlw( vector_unsigned_int) }
31293188}
31303189
31313190/// Vector Merge Low
@@ -3715,6 +3774,24 @@ where
37153774 a. vec_abss ( )
37163775}
37173776
3777+ /// Vector Rotate Left
3778+ ///
3779+ /// ## Purpose
3780+ /// Rotates each element of a vector left by a given number of bits.
3781+ ///
3782+ /// ## Result value
3783+ /// Each element of r is obtained by rotating the corresponding element of a left by
3784+ /// the number of bits specified by the corresponding element of b.
3785+ #[ inline]
3786+ #[ target_feature( enable = "altivec" ) ]
3787+ #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
3788+ pub unsafe fn vec_rl < T > ( a : T , b : <T as sealed:: VectorRl >:: B ) -> T
3789+ where
3790+ T : sealed:: VectorRl ,
3791+ {
3792+ a. vec_rl ( b)
3793+ }
3794+
37183795/// Vector Splat
37193796#[ inline]
37203797#[ target_feature( enable = "altivec" ) ]
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