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SparrowLiiSparrowLii
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Modify stdarch-gen to generate instructions composed of multiple functions and add vtst instructions (#1063)
1 parent 55e6ca1 commit 4b947e5

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4 files changed

+537
-34
lines changed

4 files changed

+537
-34
lines changed

‎crates/core_arch/src/aarch64/neon/generated.rs‎

Lines changed: 114 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -297,6 +297,66 @@ pub unsafe fn vceqzq_f64(a: float64x2_t) -> uint64x2_t {
297297
simd_eq(a, transmute(b))
298298
}
299299

300+
/// Signed compare bitwise Test bits nonzero
301+
#[inline]
302+
#[target_feature(enable = "neon")]
303+
#[cfg_attr(test, assert_instr(cmtst))]
304+
pub unsafe fn vtst_s64(a: int64x1_t, b: int64x1_t) -> uint64x1_t {
305+
let c: int64x1_t = simd_and(a, b);
306+
let d: i64x1 = i64x1::new(0);
307+
simd_ne(c, transmute(d))
308+
}
309+
310+
/// Signed compare bitwise Test bits nonzero
311+
#[inline]
312+
#[target_feature(enable = "neon")]
313+
#[cfg_attr(test, assert_instr(cmtst))]
314+
pub unsafe fn vtstq_s64(a: int64x2_t, b: int64x2_t) -> uint64x2_t {
315+
let c: int64x2_t = simd_and(a, b);
316+
let d: i64x2 = i64x2::new(0, 0);
317+
simd_ne(c, transmute(d))
318+
}
319+
320+
/// Signed compare bitwise Test bits nonzero
321+
#[inline]
322+
#[target_feature(enable = "neon")]
323+
#[cfg_attr(test, assert_instr(cmtst))]
324+
pub unsafe fn vtst_p64(a: poly64x1_t, b: poly64x1_t) -> uint64x1_t {
325+
let c: poly64x1_t = simd_and(a, b);
326+
let d: i64x1 = i64x1::new(0);
327+
simd_ne(c, transmute(d))
328+
}
329+
330+
/// Signed compare bitwise Test bits nonzero
331+
#[inline]
332+
#[target_feature(enable = "neon")]
333+
#[cfg_attr(test, assert_instr(cmtst))]
334+
pub unsafe fn vtstq_p64(a: poly64x2_t, b: poly64x2_t) -> uint64x2_t {
335+
let c: poly64x2_t = simd_and(a, b);
336+
let d: i64x2 = i64x2::new(0, 0);
337+
simd_ne(c, transmute(d))
338+
}
339+
340+
/// Unsigned compare bitwise Test bits nonzero
341+
#[inline]
342+
#[target_feature(enable = "neon")]
343+
#[cfg_attr(test, assert_instr(cmtst))]
344+
pub unsafe fn vtst_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
345+
let c: uint64x1_t = simd_and(a, b);
346+
let d: u64x1 = u64x1::new(0);
347+
simd_ne(c, transmute(d))
348+
}
349+
350+
/// Unsigned compare bitwise Test bits nonzero
351+
#[inline]
352+
#[target_feature(enable = "neon")]
353+
#[cfg_attr(test, assert_instr(cmtst))]
354+
pub unsafe fn vtstq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
355+
let c: uint64x2_t = simd_and(a, b);
356+
let d: u64x2 = u64x2::new(0, 0);
357+
simd_ne(c, transmute(d))
358+
}
359+
300360
/// Floating-point absolute value
301361
#[inline]
302362
#[target_feature(enable = "neon")]
@@ -898,6 +958,60 @@ mod test {
898958
assert_eq!(r, e);
899959
}
900960

961+
#[simd_test(enable = "neon")]
962+
unsafe fn test_vtst_s64() {
963+
let a: i64x1 = i64x1::new(-9223372036854775808);
964+
let b: i64x1 = i64x1::new(-9223372036854775808);
965+
let e: u64x1 = u64x1::new(0xFF_FF_FF_FF_FF_FF_FF_FF);
966+
let r: u64x1 = transmute(vtst_s64(transmute(a), transmute(b)));
967+
assert_eq!(r, e);
968+
}
969+
970+
#[simd_test(enable = "neon")]
971+
unsafe fn test_vtstq_s64() {
972+
let a: i64x2 = i64x2::new(-9223372036854775808, 0x00);
973+
let b: i64x2 = i64x2::new(-9223372036854775808, 0x00);
974+
let e: u64x2 = u64x2::new(0xFF_FF_FF_FF_FF_FF_FF_FF, 0);
975+
let r: u64x2 = transmute(vtstq_s64(transmute(a), transmute(b)));
976+
assert_eq!(r, e);
977+
}
978+
979+
#[simd_test(enable = "neon")]
980+
unsafe fn test_vtst_p64() {
981+
let a: i64x1 = i64x1::new(-9223372036854775808);
982+
let b: i64x1 = i64x1::new(-9223372036854775808);
983+
let e: u64x1 = u64x1::new(0xFF_FF_FF_FF_FF_FF_FF_FF);
984+
let r: u64x1 = transmute(vtst_p64(transmute(a), transmute(b)));
985+
assert_eq!(r, e);
986+
}
987+
988+
#[simd_test(enable = "neon")]
989+
unsafe fn test_vtstq_p64() {
990+
let a: i64x2 = i64x2::new(-9223372036854775808, 0x00);
991+
let b: i64x2 = i64x2::new(-9223372036854775808, 0x00);
992+
let e: u64x2 = u64x2::new(0xFF_FF_FF_FF_FF_FF_FF_FF, 0);
993+
let r: u64x2 = transmute(vtstq_p64(transmute(a), transmute(b)));
994+
assert_eq!(r, e);
995+
}
996+
997+
#[simd_test(enable = "neon")]
998+
unsafe fn test_vtst_u64() {
999+
let a: u64x1 = u64x1::new(0);
1000+
let b: u64x1 = u64x1::new(0);
1001+
let e: u64x1 = u64x1::new(0);
1002+
let r: u64x1 = transmute(vtst_u64(transmute(a), transmute(b)));
1003+
assert_eq!(r, e);
1004+
}
1005+
1006+
#[simd_test(enable = "neon")]
1007+
unsafe fn test_vtstq_u64() {
1008+
let a: u64x2 = u64x2::new(0, 0x00);
1009+
let b: u64x2 = u64x2::new(0, 0x00);
1010+
let e: u64x2 = u64x2::new(0, 0);
1011+
let r: u64x2 = transmute(vtstq_u64(transmute(a), transmute(b)));
1012+
assert_eq!(r, e);
1013+
}
1014+
9011015
#[simd_test(enable = "neon")]
9021016
unsafe fn test_vabs_f64() {
9031017
let a: f64 = -0.1;

‎crates/core_arch/src/arm/neon/generated.rs‎

Lines changed: 252 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -853,6 +853,150 @@ pub unsafe fn vceqq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
853853
simd_eq(a, b)
854854
}
855855

856+
/// Signed compare bitwise Test bits nonzero
857+
#[inline]
858+
#[target_feature(enable = "neon")]
859+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
860+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
861+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
862+
pub unsafe fn vtst_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
863+
let c: int8x8_t = simd_and(a, b);
864+
let d: i8x8 = i8x8::new(0, 0, 0, 0, 0, 0, 0, 0);
865+
simd_ne(c, transmute(d))
866+
}
867+
868+
/// Signed compare bitwise Test bits nonzero
869+
#[inline]
870+
#[target_feature(enable = "neon")]
871+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
872+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
873+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
874+
pub unsafe fn vtstq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
875+
let c: int8x16_t = simd_and(a, b);
876+
let d: i8x16 = i8x16::new(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
877+
simd_ne(c, transmute(d))
878+
}
879+
880+
/// Signed compare bitwise Test bits nonzero
881+
#[inline]
882+
#[target_feature(enable = "neon")]
883+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
884+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
885+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
886+
pub unsafe fn vtst_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
887+
let c: int16x4_t = simd_and(a, b);
888+
let d: i16x4 = i16x4::new(0, 0, 0, 0);
889+
simd_ne(c, transmute(d))
890+
}
891+
892+
/// Signed compare bitwise Test bits nonzero
893+
#[inline]
894+
#[target_feature(enable = "neon")]
895+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
896+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
897+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
898+
pub unsafe fn vtstq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
899+
let c: int16x8_t = simd_and(a, b);
900+
let d: i16x8 = i16x8::new(0, 0, 0, 0, 0, 0, 0, 0);
901+
simd_ne(c, transmute(d))
902+
}
903+
904+
/// Signed compare bitwise Test bits nonzero
905+
#[inline]
906+
#[target_feature(enable = "neon")]
907+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
908+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
909+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
910+
pub unsafe fn vtst_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
911+
let c: int32x2_t = simd_and(a, b);
912+
let d: i32x2 = i32x2::new(0, 0);
913+
simd_ne(c, transmute(d))
914+
}
915+
916+
/// Signed compare bitwise Test bits nonzero
917+
#[inline]
918+
#[target_feature(enable = "neon")]
919+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
920+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
921+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
922+
pub unsafe fn vtstq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
923+
let c: int32x4_t = simd_and(a, b);
924+
let d: i32x4 = i32x4::new(0, 0, 0, 0);
925+
simd_ne(c, transmute(d))
926+
}
927+
928+
/// Unsigned compare bitwise Test bits nonzero
929+
#[inline]
930+
#[target_feature(enable = "neon")]
931+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
932+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
933+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
934+
pub unsafe fn vtst_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
935+
let c: uint8x8_t = simd_and(a, b);
936+
let d: u8x8 = u8x8::new(0, 0, 0, 0, 0, 0, 0, 0);
937+
simd_ne(c, transmute(d))
938+
}
939+
940+
/// Unsigned compare bitwise Test bits nonzero
941+
#[inline]
942+
#[target_feature(enable = "neon")]
943+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
944+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
945+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
946+
pub unsafe fn vtstq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
947+
let c: uint8x16_t = simd_and(a, b);
948+
let d: u8x16 = u8x16::new(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
949+
simd_ne(c, transmute(d))
950+
}
951+
952+
/// Unsigned compare bitwise Test bits nonzero
953+
#[inline]
954+
#[target_feature(enable = "neon")]
955+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
956+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
957+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
958+
pub unsafe fn vtst_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
959+
let c: uint16x4_t = simd_and(a, b);
960+
let d: u16x4 = u16x4::new(0, 0, 0, 0);
961+
simd_ne(c, transmute(d))
962+
}
963+
964+
/// Unsigned compare bitwise Test bits nonzero
965+
#[inline]
966+
#[target_feature(enable = "neon")]
967+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
968+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
969+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
970+
pub unsafe fn vtstq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
971+
let c: uint16x8_t = simd_and(a, b);
972+
let d: u16x8 = u16x8::new(0, 0, 0, 0, 0, 0, 0, 0);
973+
simd_ne(c, transmute(d))
974+
}
975+
976+
/// Unsigned compare bitwise Test bits nonzero
977+
#[inline]
978+
#[target_feature(enable = "neon")]
979+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
980+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
981+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
982+
pub unsafe fn vtst_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
983+
let c: uint32x2_t = simd_and(a, b);
984+
let d: u32x2 = u32x2::new(0, 0);
985+
simd_ne(c, transmute(d))
986+
}
987+
988+
/// Unsigned compare bitwise Test bits nonzero
989+
#[inline]
990+
#[target_feature(enable = "neon")]
991+
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
992+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vtst))]
993+
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmtst))]
994+
pub unsafe fn vtstq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
995+
let c: uint32x4_t = simd_and(a, b);
996+
let d: u32x4 = u32x4::new(0, 0, 0, 0);
997+
simd_ne(c, transmute(d))
998+
}
999+
8561000
/// Floating-point absolute value
8571001
#[inline]
8581002
#[target_feature(enable = "neon")]
@@ -4021,6 +4165,114 @@ mod test {
40214165
assert_eq!(r, e);
40224166
}
40234167

4168+
#[simd_test(enable = "neon")]
4169+
unsafe fn test_vtst_s8() {
4170+
let a: i8x8 = i8x8::new(-128, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06);
4171+
let b: i8x8 = i8x8::new(-128, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06);
4172+
let e: u8x8 = u8x8::new(0xFF, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
4173+
let r: u8x8 = transmute(vtst_s8(transmute(a), transmute(b)));
4174+
assert_eq!(r, e);
4175+
}
4176+
4177+
#[simd_test(enable = "neon")]
4178+
unsafe fn test_vtstq_s8() {
4179+
let a: i8x16 = i8x16::new(-128, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x7F);
4180+
let b: i8x16 = i8x16::new(-128, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x7F);
4181+
let e: u8x16 = u8x16::new(0xFF, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
4182+
let r: u8x16 = transmute(vtstq_s8(transmute(a), transmute(b)));
4183+
assert_eq!(r, e);
4184+
}
4185+
4186+
#[simd_test(enable = "neon")]
4187+
unsafe fn test_vtst_s16() {
4188+
let a: i16x4 = i16x4::new(-32768, 0x00, 0x01, 0x02);
4189+
let b: i16x4 = i16x4::new(-32768, 0x00, 0x01, 0x02);
4190+
let e: u16x4 = u16x4::new(0xFF_FF, 0, 0xFF_FF, 0xFF_FF);
4191+
let r: u16x4 = transmute(vtst_s16(transmute(a), transmute(b)));
4192+
assert_eq!(r, e);
4193+
}
4194+
4195+
#[simd_test(enable = "neon")]
4196+
unsafe fn test_vtstq_s16() {
4197+
let a: i16x8 = i16x8::new(-32768, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06);
4198+
let b: i16x8 = i16x8::new(-32768, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06);
4199+
let e: u16x8 = u16x8::new(0xFF_FF, 0, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
4200+
let r: u16x8 = transmute(vtstq_s16(transmute(a), transmute(b)));
4201+
assert_eq!(r, e);
4202+
}
4203+
4204+
#[simd_test(enable = "neon")]
4205+
unsafe fn test_vtst_s32() {
4206+
let a: i32x2 = i32x2::new(-2147483648, 0x00);
4207+
let b: i32x2 = i32x2::new(-2147483648, 0x00);
4208+
let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0);
4209+
let r: u32x2 = transmute(vtst_s32(transmute(a), transmute(b)));
4210+
assert_eq!(r, e);
4211+
}
4212+
4213+
#[simd_test(enable = "neon")]
4214+
unsafe fn test_vtstq_s32() {
4215+
let a: i32x4 = i32x4::new(-2147483648, 0x00, 0x01, 0x02);
4216+
let b: i32x4 = i32x4::new(-2147483648, 0x00, 0x01, 0x02);
4217+
let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
4218+
let r: u32x4 = transmute(vtstq_s32(transmute(a), transmute(b)));
4219+
assert_eq!(r, e);
4220+
}
4221+
4222+
#[simd_test(enable = "neon")]
4223+
unsafe fn test_vtst_u8() {
4224+
let a: u8x8 = u8x8::new(0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06);
4225+
let b: u8x8 = u8x8::new(0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06);
4226+
let e: u8x8 = u8x8::new(0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
4227+
let r: u8x8 = transmute(vtst_u8(transmute(a), transmute(b)));
4228+
assert_eq!(r, e);
4229+
}
4230+
4231+
#[simd_test(enable = "neon")]
4232+
unsafe fn test_vtstq_u8() {
4233+
let a: u8x16 = u8x16::new(0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0xFF);
4234+
let b: u8x16 = u8x16::new(0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0xFF);
4235+
let e: u8x16 = u8x16::new(0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF);
4236+
let r: u8x16 = transmute(vtstq_u8(transmute(a), transmute(b)));
4237+
assert_eq!(r, e);
4238+
}
4239+
4240+
#[simd_test(enable = "neon")]
4241+
unsafe fn test_vtst_u16() {
4242+
let a: u16x4 = u16x4::new(0, 0x00, 0x01, 0x02);
4243+
let b: u16x4 = u16x4::new(0, 0x00, 0x01, 0x02);
4244+
let e: u16x4 = u16x4::new(0, 0, 0xFF_FF, 0xFF_FF);
4245+
let r: u16x4 = transmute(vtst_u16(transmute(a), transmute(b)));
4246+
assert_eq!(r, e);
4247+
}
4248+
4249+
#[simd_test(enable = "neon")]
4250+
unsafe fn test_vtstq_u16() {
4251+
let a: u16x8 = u16x8::new(0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06);
4252+
let b: u16x8 = u16x8::new(0, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06);
4253+
let e: u16x8 = u16x8::new(0, 0, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF);
4254+
let r: u16x8 = transmute(vtstq_u16(transmute(a), transmute(b)));
4255+
assert_eq!(r, e);
4256+
}
4257+
4258+
#[simd_test(enable = "neon")]
4259+
unsafe fn test_vtst_u32() {
4260+
let a: u32x2 = u32x2::new(0, 0x00);
4261+
let b: u32x2 = u32x2::new(0, 0x00);
4262+
let e: u32x2 = u32x2::new(0, 0);
4263+
let r: u32x2 = transmute(vtst_u32(transmute(a), transmute(b)));
4264+
assert_eq!(r, e);
4265+
}
4266+
4267+
#[simd_test(enable = "neon")]
4268+
unsafe fn test_vtstq_u32() {
4269+
let a: u32x4 = u32x4::new(0, 0x00, 0x01, 0x02);
4270+
let b: u32x4 = u32x4::new(0, 0x00, 0x01, 0x02);
4271+
let e: u32x4 = u32x4::new(0, 0, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF);
4272+
let r: u32x4 = transmute(vtstq_u32(transmute(a), transmute(b)));
4273+
assert_eq!(r, e);
4274+
}
4275+
40244276
#[simd_test(enable = "neon")]
40254277
unsafe fn test_vabs_f32() {
40264278
let a: f32x2 = f32x2::new(-0.1, -2.2);

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