|
1176 | 1176 | * [x] [`_mm256_mask_andnot_epi64`] |
1177 | 1177 | * [x] [`_mm256_maskz_andnot_epi64`] |
1178 | 1178 | * [x] [`_mm512_andnot_si512`] |
1179 | | - * [x] [`_mm512_mask_unpackhi_epi32`] |
1180 | 1179 | * [x] [`_mm512_unpackhi_epi32`] |
| 1180 | + * [x] [`_mm512_mask_unpackhi_epi32`] |
| 1181 | + * [x] [`_mm512_maskz_unpackhi_epi32`] |
1181 | 1182 | * [x] [`_mm_mask_unpackhi_epi32`] |
1182 | 1183 | * [x] [`_mm_maskz_unpackhi_epi32`] |
1183 | 1184 | * [x] [`_mm256_mask_unpackhi_epi32`] |
1184 | 1185 | * [x] [`_mm256_maskz_unpackhi_epi32`] |
1185 | 1186 | * [x] [`_mm512_unpackhi_epi64`] |
1186 | 1187 | * [x] [`_mm512_mask_unpackhi_epi64`] |
| 1188 | + * [x] [`_mm512_maskz_unpackhi_epi64`] |
1187 | 1189 | * [x] [`_mm_mask_unpackhi_epi64`] |
1188 | 1190 | * [x] [`_mm_maskz_unpackhi_epi64`] |
1189 | 1191 | * [x] [`_mm256_mask_unpackhi_epi64`] |
1190 | 1192 | * [x] [`_mm256_maskz_unpackhi_epi64`] |
1191 | 1193 | * [x] [`_mm512_unpackhi_ps`] |
1192 | 1194 | * [x] [`_mm512_mask_unpackhi_ps`] |
| 1195 | + * [x] [`_mm512_maskz_unpackhi_ps`] |
1193 | 1196 | * [x] [`_mm_mask_unpackhi_ps`] |
1194 | 1197 | * [x] [`_mm_maskz_unpackhi_ps`] |
1195 | 1198 | * [x] [`_mm256_mask_unpackhi_ps`] |
1196 | 1199 | * [x] [`_mm256_maskz_unpackhi_ps`] |
1197 | 1200 | * [x] [`_mm512_unpackhi_pd`] |
1198 | 1201 | * [x] [`_mm512_mask_unpackhi_pd`] |
| 1202 | + * [x] [`_mm512_maskz_unpackhi_pd`] |
1199 | 1203 | * [x] [`_mm_mask_unpackhi_pd`] |
1200 | 1204 | * [x] [`_mm_maskz_unpackhi_pd`] |
1201 | 1205 | * [x] [`_mm256_mask_unpackhi_pd`] |
1202 | 1206 | * [x] [`_mm256_maskz_unpackhi_pd`] |
1203 | | - * [x] [`_mm512_mask_unpacklo_epi32`] |
1204 | 1207 | * [x] [`_mm512_unpacklo_epi32`] |
| 1208 | + * [x] [`_mm512_mask_unpacklo_epi32`] |
| 1209 | + * [x] [`_mm512_maskz_unpacklo_epi32`] |
1205 | 1210 | * [x] [`_mm_mask_unpacklo_epi32`] |
1206 | 1211 | * [x] [`_mm_maskz_unpacklo_epi32`] |
1207 | 1212 | * [x] [`_mm256_mask_unpacklo_epi32`] |
1208 | 1213 | * [x] [`_mm256_maskz_unpacklo_epi32`] |
1209 | 1214 | * [x] [`_mm512_unpacklo_epi64`] |
1210 | 1215 | * [x] [`_mm512_mask_unpacklo_epi64`] |
| 1216 | + * [x] [`_mm512_maskz_unpacklo_epi64`] |
1211 | 1217 | * [x] [`_mm_mask_unpacklo_epi64`] |
1212 | 1218 | * [x] [`_mm_maskz_unpacklo_epi64`] |
1213 | 1219 | * [x] [`_mm256_mask_unpacklo_epi64`] |
1214 | 1220 | * [x] [`_mm256_maskz_unpacklo_epi64`] |
1215 | 1221 | * [x] [`_mm512_unpacklo_ps`] |
1216 | 1222 | * [x] [`_mm512_mask_unpacklo_ps`] |
| 1223 | + * [x] [`_mm512_maskz_unpacklo_ps`] |
1217 | 1224 | * [x] [`_mm_mask_unpacklo_ps`] |
1218 | 1225 | * [x] [`_mm_maskz_unpacklo_ps`] |
1219 | 1226 | * [x] [`_mm256_mask_unpacklo_ps`] |
1220 | 1227 | * [x] [`_mm256_maskz_unpacklo_ps`] |
1221 | 1228 | * [x] [`_mm512_unpacklo_pd`] |
1222 | 1229 | * [x] [`_mm512_mask_unpacklo_pd`] |
| 1230 | + * [x] [`_mm512_maskz_unpacklo_pd`] |
1223 | 1231 | * [x] [`_mm_mask_unpacklo_pd`] |
1224 | 1232 | * [x] [`_mm_maskz_unpacklo_pd`] |
1225 | 1233 | * [x] [`_mm256_mask_unpacklo_pd`] |
|
1282 | 1290 | * [x] [`_mm256_maskz_broadcastsd_pd`] |
1283 | 1291 | * [x] [`_mm512_shuffle_epi32`] |
1284 | 1292 | * [x] [`_mm512_mask_shuffle_epi32`] |
| 1293 | + * [x] [`_mm512_maskz_shuffle_epi32`] |
1285 | 1294 | * [x] [`_mm_mask_shuffle_epi32`] |
1286 | 1295 | * [x] [`_mm_maskz_shuffle_epi32`] |
1287 | 1296 | * [x] [`_mm256_mask_shuffle_epi32`] |
1288 | 1297 | * [x] [`_mm256_maskz_shuffle_epi32`] |
1289 | 1298 | * [x] [`_mm512_shuffle_ps`] |
1290 | 1299 | * [x] [`_mm512_mask_shuffle_ps`] |
| 1300 | + * [x] [`_mm512_maskz_shuffle_ps`] |
1291 | 1301 | * [x] [`_mm_mask_shuffle_ps`] |
1292 | 1302 | * [x] [`_mm_maskz_shuffle_ps`] |
1293 | 1303 | * [x] [`_mm256_mask_shuffle_ps`] |
1294 | 1304 | * [x] [`_mm256_maskz_shuffle_ps`] |
1295 | 1305 | * [x] [`_mm512_shuffle_pd`] |
1296 | 1306 | * [x] [`_mm512_mask_shuffle_pd`] |
| 1307 | + * [x] [`_mm512_maskz_shuffle_pd`] |
1297 | 1308 | * [x] [`_mm_mask_shuffle_pd`] |
1298 | 1309 | * [x] [`_mm_maskz_shuffle_pd`] |
1299 | 1310 | * [x] [`_mm256_mask_shuffle_pd`] |
1300 | 1311 | * [x] [`_mm256_maskz_shuffle_pd`] |
1301 | 1312 | * [x] [`_mm512_shuffle_i32x4`] |
1302 | 1313 | * [x] [`_mm512_mask_shuffle_i32x4`] |
| 1314 | + * [x] [`_mm512_maskz_shuffle_i32x4`] |
1303 | 1315 | * [x] [`_mm256_mask_shuffle_i32x4`] |
1304 | 1316 | * [x] [`_mm256_maskz_shuffle_i32x4`] |
1305 | 1317 | * [x] [`_mm256_shuffle_i32x4`] |
1306 | 1318 | * [x] [`_mm512_shuffle_i64x2`] |
1307 | 1319 | * [x] [`_mm512_mask_shuffle_i64x2`] |
| 1320 | + * [x] [`_mm512_maskz_shuffle_i64x2`] |
1308 | 1321 | * [x] [`_mm256_mask_shuffle_i64x2`] |
1309 | 1322 | * [x] [`_mm256_maskz_shuffle_i64x2`] |
1310 | 1323 | * [x] [`_mm256_shuffle_i64x2`] |
1311 | 1324 | * [x] [`_mm512_shuffle_f32x4`] |
1312 | 1325 | * [x] [`_mm512_mask_shuffle_f32x4`] |
| 1326 | + * [x] [`_mm512_maskz_shuffle_f32x4`] |
1313 | 1327 | * [x] [`_mm256_mask_shuffle_f32x4`] |
1314 | 1328 | * [x] [`_mm256_maskz_shuffle_f32x4`] |
1315 | 1329 | * [x] [`_mm256_shuffle_f32x4`] |
1316 | 1330 | * [x] [`_mm512_shuffle_f64x2`] |
1317 | 1331 | * [x] [`_mm512_mask_shuffle_f64x2`] |
| 1332 | + * [x] [`_mm512_maskz_shuffle_f64x2`] |
1318 | 1333 | * [x] [`_mm256_mask_shuffle_f64x2`] |
1319 | 1334 | * [x] [`_mm256_maskz_shuffle_f64x2`] |
1320 | 1335 | * [x] [`_mm256_shuffle_f64x2`] |
|
1336 | 1351 | * [x] [`_mm256_alignr_epi64`] |
1337 | 1352 | * [x] [`_mm256_mask_alignr_epi64`] |
1338 | 1353 | * [x] [`_mm256_maskz_alignr_epi64`] |
| 1354 | + * [x] [`_mm512_permute_ps`] |
| 1355 | + * [x] [`_mm512_mask_permute_ps`] |
| 1356 | + * [x] [`_mm512_maskz_permute_ps`] |
| 1357 | + |
| 1358 | + * [x] [`_mm512_permute_pd`] |
| 1359 | + * [x] [`_mm512_mask_permute_pd`] |
| 1360 | + * [x] [`_mm512_maskz_permute_pd`] |
| 1361 | + |
| 1362 | + * [x] [`_mm512_permutevar_epi32`] |
| 1363 | + * [x] [`_mm512_mask_permutevar_epi32`] |
| 1364 | + |
| 1365 | + * [x] [`_mm512_permutevar_ps`] |
| 1366 | + * [x] [`_mm512_mask_permutevar_ps`] |
| 1367 | + * [x] [`_mm512_maskz_permutevar_ps`] |
| 1368 | + |
| 1369 | + * [x] [`_mm512_permutevar_pd`] |
| 1370 | + * [x] [`_mm512_mask_permutevar_pd`] |
| 1371 | + * [x] [`_mm512_maskz_permutevar_pd`] |
| 1372 | + |
| 1373 | + * [x] [`_mm512_permutex2var_epi32`] |
| 1374 | + * [x] [`_mm512_mask_permutex2var_epi32`] |
| 1375 | + * [x] [`_mm512_maskz_permutex2var_epi32`] |
| 1376 | + * [x] [`_mm512_mask2_permutex2var_epi32`] |
| 1377 | + |
| 1378 | + * [x] [`_mm512_permutex2var_epi64`] |
| 1379 | + * [x] [`_mm512_mask_permutex2var_epi64`] |
| 1380 | + * [x] [`_mm512_maskz_permutex2var_epi64`] |
| 1381 | + * [x] [`_mm512_mask2_permutex2var_epi64`] |
| 1382 | + |
| 1383 | + * [x] [`_mm512_permutex2var_ps`] |
| 1384 | + * [x] [`_mm512_mask_permutex2var_ps`] |
| 1385 | + * [x] [`_mm512_maskz_permutex2var_ps`] |
| 1386 | + * [x] [`_mm512_mask2_permutex2var_ps`] |
| 1387 | + |
| 1388 | + * [x] [`_mm512_permutex2var_pd`] |
| 1389 | + * [x] [`_mm512_mask_permutex2var_pd`] |
| 1390 | + * [x] [`_mm512_maskz_permutex2var_pd`] |
| 1391 | + * [x] [`_mm512_mask2_permutex2var_pd`] |
| 1392 | + |
| 1393 | + * [x] [`_mm512_permutex_epi64`] |
| 1394 | + * [x] [`_mm512_mask_permutex_epi64`] |
| 1395 | + * [x] [`_mm512_maskz_permutex_epi64`] |
| 1396 | + |
| 1397 | + * [x] [`_mm512_permutex_pd`] |
| 1398 | + * [x] [`_mm512_mask_permutex_pd`] |
| 1399 | + * [x] [`_mm512_maskz_permutex_pd`] |
| 1400 | + |
| 1401 | + * [x] [`_mm512_permutexvar_epi32`] |
| 1402 | + * [x] [`_mm512_mask_permutexvar_epi32`] |
| 1403 | + * [x] [`_mm512_maskz_permutexvar_epi32`] |
| 1404 | + |
| 1405 | + * [x] [`_mm512_permutexvar_epi64`] |
| 1406 | + * [x] [`_mm512_mask_permutexvar_epi64`] |
| 1407 | + * [x] [`_mm512_maskz_permutexvar_epi64`] |
| 1408 | + |
| 1409 | + * [x] [`_mm512_permutexvar_ps`] |
| 1410 | + * [x] [`_mm512_mask_permutexvar_ps`] |
| 1411 | + * [x] [`_mm512_maskz_permutexvar_ps`] |
| 1412 | + |
| 1413 | + * [x] [`_mm512_permutexvar_pd`] |
| 1414 | + * [x] [`_mm512_mask_permutexvar_pd`] |
| 1415 | + * [x] [`_mm512_maskz_permutexvar_pd`] |
1339 | 1416 |
|
1340 | 1417 | * [x] [`_mm512_castpd128_pd512`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_castpd128_pd512&expand=5236) |
1341 | 1418 | * [x] [`_mm512_castpd256_pd512`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_castpd256_pd512&expand=5236) |
|
1470 | 1547 | * [x] [`_mm512_loadu_epi32`] |
1471 | 1548 | * [x] [`_mm512_loadu_epi64`] |
1472 | 1549 | * [x] [`_mm512_loadu_si512`] |
1473 | | - * [x] [`_mm512_mask2_permutex2var_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask2_permutex2var_epi32&expand=5236) |
1474 | | - * [x] [`_mm512_mask2_permutex2var_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask2_permutex2var_epi64&expand=5236) |
1475 | | - * [x] [`_mm512_mask2_permutex2var_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask2_permutex2var_pd&expand=5236) |
1476 | | - * [x] [`_mm512_mask2_permutex2var_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask2_permutex2var_ps&expand=5236) |
1477 | 1550 | * [x] [`_mm512_mask2int`] |
1478 | 1551 | * [x] [`_mm512_mask_compress_epi32`] |
1479 | 1552 | * [x] [`_mm512_mask_compress_epi64`] |
|
1608 | 1681 | * [ ] [`_mm512_mask_loadu_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_loadu_epi64&expand=5236) |
1609 | 1682 | * [ ] [`_mm512_mask_loadu_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_loadu_pd&expand=5236) |
1610 | 1683 | * [ ] [`_mm512_mask_loadu_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_loadu_ps&expand=5236) |
1611 | | - * [x] [`_mm512_mask_permute_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permute_pd&expand=5236) |
1612 | | - * [x] [`_mm512_mask_permute_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permute_ps&expand=5236) |
1613 | | - * [x] [`_mm512_mask_permutevar_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutevar_epi32&expand=5236) |
1614 | | - * [x] [`_mm512_mask_permutevar_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutevar_pd&expand=5236) |
1615 | | - * [x] [`_mm512_mask_permutevar_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutevar_ps&expand=5236) |
1616 | | - * [x] [`_mm512_mask_permutex2var_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutex2var_epi32&expand=5236) |
1617 | | - * [x] [`_mm512_mask_permutex2var_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutex2var_epi64&expand=5236) |
1618 | | - * [x] [`_mm512_mask_permutex2var_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutex2var_pd&expand=5236) |
1619 | | - * [x] [`_mm512_mask_permutex2var_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutex2var_ps&expand=5236) |
1620 | | - * [x] [`_mm512_mask_permutex_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutex_epi64&expand=5236) |
1621 | | - * [x] [`_mm512_mask_permutex_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutex_pd&expand=5236) |
1622 | | - * [x] [`_mm512_mask_permutexvar_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutexvar_epi32&expand=5236) |
1623 | | - * [x] [`_mm512_mask_permutexvar_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutexvar_epi64&expand=5236) |
1624 | | - * [x] [`_mm512_mask_permutexvar_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutexvar_pd&expand=5236) |
1625 | | - * [x] [`_mm512_mask_permutexvar_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_permutexvar_ps&expand=5236) |
1626 | 1684 | * [x] [`_mm512_mask_set1_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_set1_epi32&expand=5236) |
1627 | 1685 | * [x] [`_mm512_mask_set1_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_set1_epi64&expand=5236) |
1628 | 1686 | * [ ] [`_mm512_mask_store_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_mask_store_epi32&expand=5236) |
|
1722 | 1780 | * [ ] [`_mm512_maskz_loadu_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_loadu_epi64&expand=5236) |
1723 | 1781 | * [ ] [`_mm512_maskz_loadu_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_loadu_pd&expand=5236) |
1724 | 1782 | * [ ] [`_mm512_maskz_loadu_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_loadu_ps&expand=5236) |
1725 | | - * [x] [`_mm512_maskz_permute_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permute_pd&expand=5236) |
1726 | | - * [x] [`_mm512_maskz_permute_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permute_ps&expand=5236) |
1727 | | - * [x] [`_mm512_maskz_permutevar_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutevar_pd&expand=5236) |
1728 | | - * [x] [`_mm512_maskz_permutevar_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutevar_ps&expand=5236) |
1729 | | - * [x] [`_mm512_maskz_permutex2var_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutex2var_epi32&expand=5236) |
1730 | | - * [x] [`_mm512_maskz_permutex2var_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutex2var_epi64&expand=5236) |
1731 | | - * [x] [`_mm512_maskz_permutex2var_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutex2var_pd&expand=5236) |
1732 | | - * [x] [`_mm512_maskz_permutex2var_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutex2var_ps&expand=5236) |
1733 | | - * [x] [`_mm512_maskz_permutex_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutex_epi64&expand=5236) |
1734 | | - * [x] [`_mm512_maskz_permutex_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutex_pd&expand=5236) |
1735 | | - * [x] [`_mm512_maskz_permutexvar_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutexvar_epi32&expand=5236) |
1736 | | - * [x] [`_mm512_maskz_permutexvar_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutexvar_epi64&expand=5236) |
1737 | | - * [x] [`_mm512_maskz_permutexvar_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutexvar_pd&expand=5236) |
1738 | | - * [x] [`_mm512_maskz_permutexvar_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_permutexvar_ps&expand=5236) |
1739 | 1783 | * [x] [`_mm512_maskz_set1_epi32`] |
1740 | 1784 | * [x] [`_mm512_maskz_set1_epi64`] |
1741 | | - * [x] [`_mm512_maskz_shuffle_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_shuffle_epi32&expand=5236) |
1742 | | - * [x] [`_mm512_maskz_shuffle_f32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_shuffle_f32x4&expand=5236) |
1743 | | - * [x] [`_mm512_maskz_shuffle_f64x2`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_shuffle_f64x2&expand=5236) |
1744 | | - * [x] [`_mm512_maskz_shuffle_i32x4`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_shuffle_i32x4&expand=5236) |
1745 | | - * [x] [`_mm512_maskz_shuffle_i64x2`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_shuffle_i64x2&expand=5236) |
1746 | | - * [x] [`_mm512_maskz_shuffle_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_shuffle_pd&expand=5236) |
1747 | | - * [x] [`_mm512_maskz_shuffle_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_shuffle_ps&expand=5236) |
1748 | 1785 | * [x] [`_mm512_maskz_ternarylogic_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_ternarylogic_epi32&expand=5236) |
1749 | 1786 | * [x] [`_mm512_maskz_ternarylogic_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_ternarylogic_epi64&expand=5236) |
1750 | | - * [x] [`_mm512_maskz_unpackhi_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_unpackhi_epi32&expand=5236) |
1751 | | - * [x] [`_mm512_maskz_unpackhi_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_unpackhi_epi64&expand=5236) |
1752 | | - * [x] [`_mm512_maskz_unpackhi_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_unpackhi_pd&expand=5236) |
1753 | | - * [x] [`_mm512_maskz_unpackhi_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_unpackhi_ps&expand=5236) |
1754 | | - * [x] [`_mm512_maskz_unpacklo_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_unpacklo_epi32&expand=5236) |
1755 | | - * [x] [`_mm512_maskz_unpacklo_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_unpacklo_epi64&expand=5236) |
1756 | | - * [x] [`_mm512_maskz_unpacklo_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_unpacklo_pd&expand=5236) |
1757 | | - * [x] [`_mm512_maskz_unpacklo_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_maskz_unpacklo_ps&expand=5236) |
1758 | | - * [x] [`_mm512_permute_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permute_pd&expand=5236) |
1759 | | - * [x] [`_mm512_permute_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permute_ps&expand=5236) |
1760 | | - * [x] [`_mm512_permutevar_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutevar_epi32&expand=5236) |
1761 | | - * [x] [`_mm512_permutevar_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutevar_pd&expand=5236) |
1762 | | - * [x] [`_mm512_permutevar_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutevar_ps&expand=5236) |
1763 | | - * [x] [`_mm512_permutex2var_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutex2var_epi32&expand=5236) |
1764 | | - * [x] [`_mm512_permutex2var_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutex2var_epi64&expand=5236) |
1765 | | - * [x] [`_mm512_permutex2var_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutex2var_pd&expand=5236) |
1766 | | - * [x] [`_mm512_permutex2var_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutex2var_ps&expand=5236) |
1767 | | - * [x] [`_mm512_permutex_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutex_epi64&expand=5236) |
1768 | | - * [x] [`_mm512_permutex_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutex_pd&expand=5236) |
1769 | | - * [x] [`_mm512_permutexvar_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutexvar_epi32&expand=5236) |
1770 | | - * [x] [`_mm512_permutexvar_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutexvar_epi64&expand=5236) |
1771 | | - * [x] [`_mm512_permutexvar_pd`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutexvar_pd&expand=5236) |
1772 | | - * [x] [`_mm512_permutexvar_ps`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_permutexvar_ps&expand=5236) |
1773 | 1787 | * [x] [`_mm512_set1_epi16`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_set1_epi16&expand=5236) |
1774 | 1788 | * [x] [`_mm512_set1_epi32`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_set1_epi32&expand=5236) |
1775 | 1789 | * [x] [`_mm512_set1_epi64`](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm512_set1_epi64&expand=5236) |
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