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asm! support for the Xtensa architecture #147302

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@MabezDev MabezDev commented Oct 3, 2025 •
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This implements the asm! support for Xtensa. We've been using this code for a few years in our fork and it's been working well. I finally found some time to clean it up a bit and start the upstreaming process. This should be one of the final PRs for Xtensa support on the Rust side (minus bug fixes of course). After this, we're mostly just waiting on the LLVM upstreaming which is going well. This PR doesn't cover all possible asm options for Xtensa, but the base ISA plus a few extras that are used in Espressif chips.

r? Amanieu

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rustbot commented Oct 3, 2025

Some changes occurred in compiler/rustc_codegen_gcc

cc @antoyo, @GuillaumeGomez

@rustbot rustbot added A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Oct 3, 2025
@rustbot rustbot added the T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. label Oct 3, 2025
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@taiki-e taiki-e mentioned this pull request Oct 3, 2025
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bjorn3
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This is also missing an update to the unstable book entry for asm_experimental_arch.

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compiler/rustc_target/src/asm/xtensa.rs
def_reg_class! {
Xtensa XtensaInlineAsmRegClass {
reg,
freg,
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LLVM doesn't seem to support this. XtensaTargetLowering::getRegForInlineAsmConstraint only handles r constraints.

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It will just not yet. I'll back out the floating point bits for now, unless you think it's okay to land ready for the LLVM updates.

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bors commented Nov 5, 2025

☔ The latest upstream changes (presumably #147645) made this pull request unmergeable. Please resolve the merge conflicts.

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rustbot commented Nov 14, 2025

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

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@MabezDev @taiki-e @KerryRJ
asm! support for the Xtensa architecture
1e1ed2e 
Co-authored-by: Taiki Endo <te316e89@gmail.com>
Co-authored-by: Kerry Jones <kerry@iodrive.co.za>
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MabezDev commented Nov 14, 2025

I've made most of the updates here (sorry for the delay!).

It turns out we'll need a patch that landed just after rust branched LLVM: https://github.com/rust-lang/llvm-project/tree/rustc/21.1-2025-08-01/llvm/lib/Target/Xtensa , otherwise the asm tests fail :(.

The good news is that we've since landed FP support in LLVM upstream too, so maybe the next time rust branches LLVM 21 (I guess 21.2?) we can rerun CI on this PR and it will be green.

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The job aarch64-gnu-llvm-20-1 failed! Check out the build log: (web) (plain enhanced) (plain)

Click to see the possible cause of the failure (guessed by this bot) 
test [assembly] tests/assembly-llvm/x86_64-windows-i128-abi.rs#softfloat ... ok

failures:

---- [assembly] tests/assembly-llvm/asm/xtensa-types.rs stdout ----
------rustc stdout------------------------------

------rustc stderr------------------------------
'esp32' is not a recognized processor for this target (ignoring processor)
'esp32' is not a recognized processor for this target (ignoring processor)
'+fp' is not a recognized feature for this target (ignoring feature)
'+fp' is not a recognized feature for this target (ignoring feature)
'+coprocessor' is not a recognized feature for this target (ignoring feature)
'+coprocessor' is not a recognized feature for this target (ignoring feature)
'+highpriinterrupts' is not a recognized feature for this target (ignoring feature)
'+highpriinterrupts' is not a recognized feature for this target (ignoring feature)
'+interrupt' is not a recognized feature for this target (ignoring feature)
'+interrupt' is not a recognized feature for this target (ignoring feature)
'+windowed' is not a recognized feature for this target (ignoring feature)
'+windowed' is not a recognized feature for this target (ignoring feature)
'+loop' is not a recognized feature for this target (ignoring feature)
'+loop' is not a recognized feature for this target (ignoring feature)
'+sext' is not a recognized feature for this target (ignoring feature)
'+sext' is not a recognized feature for this target (ignoring feature)
'+nsa' is not a recognized feature for this target (ignoring feature)
'+nsa' is not a recognized feature for this target (ignoring feature)
'+mul32' is not a recognized feature for this target (ignoring feature)
'+mul32' is not a recognized feature for this target (ignoring feature)
'+mul32high' is not a recognized feature for this target (ignoring feature)
'+mul32high' is not a recognized feature for this target (ignoring feature)
'+div32' is not a recognized feature for this target (ignoring feature)
'+div32' is not a recognized feature for this target (ignoring feature)
'+mac16' is not a recognized feature for this target (ignoring feature)
'+mac16' is not a recognized feature for this target (ignoring feature)
'+s32c1i' is not a recognized feature for this target (ignoring feature)
'+s32c1i' is not a recognized feature for this target (ignoring feature)
'+threadptr' is not a recognized feature for this target (ignoring feature)
'+threadptr' is not a recognized feature for this target (ignoring feature)
'+extendedl32r' is not a recognized feature for this target (ignoring feature)
'+extendedl32r' is not a recognized feature for this target (ignoring feature)
'+atomctl' is not a recognized feature for this target (ignoring feature)
'+atomctl' is not a recognized feature for this target (ignoring feature)
'+memctl' is not a recognized feature for this target (ignoring feature)
'+memctl' is not a recognized feature for this target (ignoring feature)
'+debug' is not a recognized feature for this target (ignoring feature)
'+debug' is not a recognized feature for this target (ignoring feature)
'+exception' is not a recognized feature for this target (ignoring feature)
'+exception' is not a recognized feature for this target (ignoring feature)
'+rvector' is not a recognized feature for this target (ignoring feature)
'+rvector' is not a recognized feature for this target (ignoring feature)
'+timerint' is not a recognized feature for this target (ignoring feature)
'+timerint' is not a recognized feature for this target (ignoring feature)
'+prid' is not a recognized feature for this target (ignoring feature)
'+prid' is not a recognized feature for this target (ignoring feature)
'+regprotect' is not a recognized feature for this target (ignoring feature)
'+regprotect' is not a recognized feature for this target (ignoring feature)
'+miscsr' is not a recognized feature for this target (ignoring feature)
'+miscsr' is not a recognized feature for this target (ignoring feature)
warning: type `c_void` should have an upper camel case name
##[warning]   --> /checkout/tests/auxiliary/minicore.rs:260:10
    |
260 | pub enum c_void {
    |          ^^^^^^ help: convert the identifier to upper camel case: `CVoid`
    |
    = note: `#[warn(non_camel_case_types)]` (part of `#[warn(nonstandard_style)]`) on by default

warning: variant `__variant1` should have an upper camel case name
##[warning]   --> /checkout/tests/auxiliary/minicore.rs:261:5
    |
261 |     __variant1,
    |     ^^^^^^^^^^ help: convert the identifier to upper camel case: `Variant1`

warning: variant `__variant2` should have an upper camel case name
##[warning]   --> /checkout/tests/auxiliary/minicore.rs:262:5
    |
262 |     __variant2,
    |     ^^^^^^^^^^ help: convert the identifier to upper camel case: `Variant2`

'esp32' is not a recognized processor for this target (ignoring processor)
'esp32' is not a recognized processor for this target (ignoring processor)
error: data-layout for target `xtensa-esp32-none-elf`, `e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32`, differs from LLVM target's `xtensa-none-elf` default layout, `e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32`

'esp32' is not a recognized processor for this target (ignoring processor)
'esp32' is not a recognized processor for this target (ignoring processor)
error: aborting due to 1 previous error; 3 warnings emitted


------------------------------------------

error: auxiliary build of /checkout/tests/auxiliary/minicore.rs failed to compile: 
status: exit status: 1
command: "/checkout/obj/build/aarch64-unknown-linux-gnu/stage2/bin/rustc" "/checkout/tests/auxiliary/minicore.rs" "-Zthreads=1" "-Zsimulate-remapped-rust-src-base=/rustc/FAKE_PREFIX" "-Ztranslate-remapped-path-to-local-path=no" "-Z" "ignore-directory-in-diagnostics-source-blocks=/cargo" "-Z" "ignore-directory-in-diagnostics-source-blocks=/checkout/vendor" "--sysroot" "/checkout/obj/build/aarch64-unknown-linux-gnu/stage2" "--check-cfg" "cfg(test,FALSE)" "-O" "-Cdebug-assertions=no" "-Zcodegen-source-order" "-C" "prefer-dynamic" "-o" "/checkout/obj/build/aarch64-unknown-linux-gnu/test/assembly-llvm/asm/xtensa-types/libminicore.rlib" "-A" "unused" "-W" "unused_attributes" "-A" "internal_features" "-A" "unused_parens" "-A" "unused_braces" "-Crpath" "-Cdebuginfo=0" "-Cpanic=abort" "-Cforce-unwind-tables=yes" "--target" "xtensa-esp32-none-elf" "--crate-type" "rlib" "-Cpanic=abort"
stdout: none
--- stderr -------------------------------
'esp32' is not a recognized processor for this target (ignoring processor)
'esp32' is not a recognized processor for this target (ignoring processor)
'+fp' is not a recognized feature for this target (ignoring feature)
'+fp' is not a recognized feature for this target (ignoring feature)
'+coprocessor' is not a recognized feature for this target (ignoring feature)
'+coprocessor' is not a recognized feature for this target (ignoring feature)
'+highpriinterrupts' is not a recognized feature for this target (ignoring feature)
'+highpriinterrupts' is not a recognized feature for this target (ignoring feature)
'+interrupt' is not a recognized feature for this target (ignoring feature)
'+interrupt' is not a recognized feature for this target (ignoring feature)
'+windowed' is not a recognized feature for this target (ignoring feature)
'+windowed' is not a recognized feature for this target (ignoring feature)
'+loop' is not a recognized feature for this target (ignoring feature)
'+loop' is not a recognized feature for this target (ignoring feature)
'+sext' is not a recognized feature for this target (ignoring feature)
'+sext' is not a recognized feature for this target (ignoring feature)
'+nsa' is not a recognized feature for this target (ignoring feature)
'+nsa' is not a recognized feature for this target (ignoring feature)
'+mul32' is not a recognized feature for this target (ignoring feature)
'+mul32' is not a recognized feature for this target (ignoring feature)
'+mul32high' is not a recognized feature for this target (ignoring feature)
'+mul32high' is not a recognized feature for this target (ignoring feature)
'+div32' is not a recognized feature for this target (ignoring feature)
'+div32' is not a recognized feature for this target (ignoring feature)
'+mac16' is not a recognized feature for this target (ignoring feature)
'+mac16' is not a recognized feature for this target (ignoring feature)
'+s32c1i' is not a recognized feature for this target (ignoring feature)
'+s32c1i' is not a recognized feature for this target (ignoring feature)
'+threadptr' is not a recognized feature for this target (ignoring feature)
'+threadptr' is not a recognized feature for this target (ignoring feature)
'+extendedl32r' is not a recognized feature for this target (ignoring feature)
'+extendedl32r' is not a recognized feature for this target (ignoring feature)
'+atomctl' is not a recognized feature for this target (ignoring feature)
'+atomctl' is not a recognized feature for this target (ignoring feature)
'+memctl' is not a recognized feature for this target (ignoring feature)
'+memctl' is not a recognized feature for this target (ignoring feature)
'+debug' is not a recognized feature for this target (ignoring feature)
'+debug' is not a recognized feature for this target (ignoring feature)
'+exception' is not a recognized feature for this target (ignoring feature)
'+exception' is not a recognized feature for this target (ignoring feature)
'+rvector' is not a recognized feature for this target (ignoring feature)
'+rvector' is not a recognized feature for this target (ignoring feature)
'+timerint' is not a recognized feature for this target (ignoring feature)
'+timerint' is not a recognized feature for this target (ignoring feature)
'+prid' is not a recognized feature for this target (ignoring feature)
'+prid' is not a recognized feature for this target (ignoring feature)
'+regprotect' is not a recognized feature for this target (ignoring feature)
'+regprotect' is not a recognized feature for this target (ignoring feature)
'+miscsr' is not a recognized feature for this target (ignoring feature)
'+miscsr' is not a recognized feature for this target (ignoring feature)
warning: type `c_void` should have an upper camel case name
##[warning]   --> /checkout/tests/auxiliary/minicore.rs:260:10
    |
260 | pub enum c_void {
    |          ^^^^^^ help: convert the identifier to upper camel case: `CVoid`
    |
    = note: `#[warn(non_camel_case_types)]` (part of `#[warn(nonstandard_style)]`) on by default

warning: variant `__variant1` should have an upper camel case name
##[warning]   --> /checkout/tests/auxiliary/minicore.rs:261:5
    |
261 |     __variant1,
    |     ^^^^^^^^^^ help: convert the identifier to upper camel case: `Variant1`

warning: variant `__variant2` should have an upper camel case name
##[warning]   --> /checkout/tests/auxiliary/minicore.rs:262:5
    |
262 |     __variant2,
    |     ^^^^^^^^^^ help: convert the identifier to upper camel case: `Variant2`

'esp32' is not a recognized processor for this target (ignoring processor)
'esp32' is not a recognized processor for this target (ignoring processor)
error: data-layout for target `xtensa-esp32-none-elf`, `e-m:e-p:32:32-v1:8:8-i64:64-i128:128-n32`, differs from LLVM target's `xtensa-none-elf` default layout, `e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32`

'esp32' is not a recognized processor for this target (ignoring processor)
'esp32' is not a recognized processor for this target (ignoring processor)
error: aborting due to 1 previous error; 3 warnings emitted
------------------------------------------

---- [assembly] tests/assembly-llvm/asm/xtensa-types.rs stdout end ----

failures:
    [assembly] tests/assembly-llvm/asm/xtensa-types.rs

test result: FAILED. 507 passed; 1 failed; 72 ignored; 0 measured; 0 filtered out; finished in 16.09s

Some tests failed in compiletest suite=assembly-llvm mode=assembly host=aarch64-unknown-linux-gnu target=aarch64-unknown-linux-gnu
Bootstrap failed while executing `--stage 2 test --skip compiler --skip src`

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A-LLVM Area: Code generation parts specific to LLVM. Both correctness bugs and optimization-related issues. S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.

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