We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent aedd4c6 commit edc5f73Copy full SHA for edc5f73
src/librustc_mir/interpret/operator.rs
@@ -90,7 +90,7 @@ impl<'a, 'mir, 'tcx, M: Machine<'mir, 'tcx>> EvalContext<'a, 'mir, 'tcx, M> {
90
let signed = left_layout.abi.is_signed();
91
let mut r = r as u32;
92
let size = left_layout.size.bits() as u32;
93
- let oflo = r > size;
+ let oflo = r >= size;
94
if oflo {
95
r %= size;
96
}
0 commit comments