Skip to content

Commit dc3bc90

Browse files
JakobDegenJakobDegen
committed
Fix other tests broken by change to SimplifyArmIdentity 
1 parent 8af6511 commit dc3bc90

8 files changed

+417
-358
lines changed

‎src/test/codegen/try_identity.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
// compile-flags: -C no-prepopulate-passes -O -Z mir-opt-level=3 -Zunsound-mir-opts
1+
// compile-flags: -C opt-level=3 -O -Z mir-opt-level=3 -Zunsound-mir-opts
22

33
// Ensure that `x?` has no overhead on `Result<T, E>` due to identity `match`es in lowering.
44
// This requires inlining to trigger the MIR optimizations in `SimplifyArmIdentity`.

‎src/test/mir-opt/issue_73223.main.PreCodegen.32bit.diff‎

Lines changed: 47 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -6,38 +6,37 @@
66
let _1: i32; // in scope 0 at $DIR/issue-73223.rs:2:9: 2:14
77
let mut _2: std::option::Option<i32>; // in scope 0 at $DIR/issue-73223.rs:2:23: 2:30
88
let _3: i32; // in scope 0 at $DIR/issue-73223.rs:3:14: 3:15
9-
let mut _5: i32; // in scope 0 at $DIR/issue-73223.rs:7:22: 7:27
10-
let mut _6: (&i32, &i32); // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
9+
let mut _5: (&i32, &i32); // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
10+
let mut _6: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
1111
let mut _7: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
12-
let mut _8: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
12+
let mut _10: bool; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
1313
let mut _11: bool; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
14-
let mut _12: bool; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
15-
let mut _13: i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
16-
let mut _15: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
17-
let _16: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
18-
let mut _17: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
19-
let _18: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
20-
let mut _19: std::option::Option<std::fmt::Arguments>; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
14+
let mut _12: i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
15+
let mut _14: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
16+
let _15: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
17+
let mut _16: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
18+
let _17: &i32; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
19+
let mut _18: std::option::Option<std::fmt::Arguments>; // in scope 0 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
2120
scope 1 {
22-
debug split => _1; // in scope 1 at $DIR/issue-73223.rs:2:9: 2:14
21+
debug split => ((_4 as Some).0: i32); // in scope 1 at $DIR/issue-73223.rs:2:9: 2:14
2322
let _4: std::option::Option<i32>; // in scope 1 at $DIR/issue-73223.rs:7:9: 7:14
2423
scope 3 {
2524
debug _prev => _4; // in scope 3 at $DIR/issue-73223.rs:7:9: 7:14
25+
let _8: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
2626
let _9: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
27-
let _10: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
28-
let mut _20: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
27+
let mut _19: &i32; // in scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
2928
scope 4 {
30-
debug left_val => _9; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
31-
debug right_val => _10; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
32-
let _14: core::panicking::AssertKind; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
29+
debug left_val => _8; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
30+
debug right_val => _9; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
31+
let _13: core::panicking::AssertKind; // in scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
3332
scope 5 {
34-
debug kind => _14; // in scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
33+
debug kind => _13; // in scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
3534
}
3635
}
3736
}
3837
}
3938
scope 2 {
40-
debug v => _3; // in scope 2 at $DIR/issue-73223.rs:3:14: 3:15
39+
debug v => ((_4 as Some).0: i32); // in scope 2 at $DIR/issue-73223.rs:3:14: 3:15
4140
}
4241

4342
bb0: {
@@ -46,58 +45,54 @@
4645
((_2 as Some).0: i32) = const 1_i32; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
4746
discriminant(_2) = 1; // scope 0 at $DIR/issue-73223.rs:2:23: 2:30
4847
StorageLive(_3); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
48+
StorageLive(_4); // scope 1 at $DIR/issue-73223.rs:7:9: 7:14
4949
_3 = ((_2 as Some).0: i32); // scope 0 at $DIR/issue-73223.rs:3:14: 3:15
5050
_1 = _3; // scope 2 at $DIR/issue-73223.rs:3:20: 3:21
51+
_4 = _2; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
5152
StorageDead(_3); // scope 0 at $DIR/issue-73223.rs:3:20: 3:21
5253
StorageDead(_2); // scope 0 at $DIR/issue-73223.rs:5:6: 5:7
53-
StorageLive(_4); // scope 1 at $DIR/issue-73223.rs:7:9: 7:14
54-
StorageLive(_5); // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
55-
_5 = _1; // scope 1 at $DIR/issue-73223.rs:7:22: 7:27
56-
((_4 as Some).0: i32) = move _5; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
57-
discriminant(_4) = 1; // scope 1 at $DIR/issue-73223.rs:7:17: 7:28
58-
StorageDead(_5); // scope 1 at $DIR/issue-73223.rs:7:27: 7:28
54+
StorageLive(_5); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
5955
StorageLive(_6); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
56+
_6 = &_1; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
6057
StorageLive(_7); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
61-
_7 = &_1; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
62-
StorageLive(_8); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
63-
_20 = const main::promoted[0]; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
58+
_19 = const main::promoted[0]; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
6459
// mir::Constant
6560
// + span: $SRC_DIR/core/src/macros/mod.rs:LL:COL
6661
// + literal: Const { ty: &i32, val: Unevaluated(main, [], Some(promoted[0])) }
67-
_8 = _20; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
68-
(_6.0: &i32) = move _7; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
69-
(_6.1: &i32) = move _8; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
70-
StorageDead(_8); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
62+
_7 = _19; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
63+
(_5.0: &i32) = move _6; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
64+
(_5.1: &i32) = move _7; // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
7165
StorageDead(_7); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
66+
StorageDead(_6); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
67+
StorageLive(_8); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
68+
_8 = (_5.0: &i32); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
7269
StorageLive(_9); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
73-
_9 = (_6.0: &i32); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
74-
StorageLive(_10); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
75-
_10 = (_6.1: &i32); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
70+
_9 = (_5.1: &i32); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
71+
StorageLive(_10); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
7672
StorageLive(_11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
7773
StorageLive(_12); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
78-
StorageLive(_13); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
79-
_13 = (*_9); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
80-
_12 = Eq(move _13, const 1_i32); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
81-
StorageDead(_13); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
82-
_11 = Not(move _12); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
74+
_12 = (*_8); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
75+
_11 = Eq(move _12, const 1_i32); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
8376
StorageDead(_12); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
84-
switchInt(move _11) -> [false: bb2, otherwise: bb1]; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
77+
_10 = Not(move _11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
78+
StorageDead(_11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
79+
switchInt(move _10) -> [false: bb2, otherwise: bb1]; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
8580
}
8681

8782
bb1: {
88-
StorageLive(_14); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
89-
discriminant(_14) = 0; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
83+
StorageLive(_13); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
84+
discriminant(_13) = 0; // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
85+
StorageLive(_14); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
9086
StorageLive(_15); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
87+
_15 = _8; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
88+
_14 = _15; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
9189
StorageLive(_16); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
92-
_16 = _9; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
93-
_15 = _16; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
9490
StorageLive(_17); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
91+
_17 = _9; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
92+
_16 = _17; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
9593
StorageLive(_18); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
96-
_18 = _10; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
97-
_17 = _18; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
98-
StorageLive(_19); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
99-
discriminant(_19) = 0; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
100-
core::panicking::assert_failed::<i32, i32>(const core::panicking::AssertKind::Eq, move _15, move _17, move _19); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
94+
discriminant(_18) = 0; // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
95+
core::panicking::assert_failed::<i32, i32>(const core::panicking::AssertKind::Eq, move _14, move _16, move _18); // scope 5 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
10196
// mir::Constant
10297
// + span: $SRC_DIR/core/src/macros/mod.rs:LL:COL
10398
// + literal: Const { ty: for<'r, 's, 't0> fn(core::panicking::AssertKind, &'r i32, &'s i32, Option<Arguments<'t0>>) -> ! {core::panicking::assert_failed::<i32, i32>}, val: Value(Scalar(<ZST>)) }
@@ -107,10 +102,10 @@
107102
}
108103

109104
bb2: {
110-
StorageDead(_11); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
111-
StorageDead(_10); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
105+
StorageDead(_10); // scope 4 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
112106
StorageDead(_9); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
113-
StorageDead(_6); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
107+
StorageDead(_8); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
108+
StorageDead(_5); // scope 3 at $SRC_DIR/core/src/macros/mod.rs:LL:COL
114109
StorageDead(_4); // scope 1 at $DIR/issue-73223.rs:9:1: 9:2
115110
StorageDead(_1); // scope 0 at $DIR/issue-73223.rs:9:1: 9:2
116111
return; // scope 0 at $DIR/issue-73223.rs:9:2: 9:2

0 commit comments

Comments
 (0)