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MabezDevtaiki-eKerryRJ
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asm! support for the Xtensa architecture
Co-authored-by: Taiki Endo <te316e89@gmail.com> Co-authored-by: Kerry Jones <kerry@iodrive.co.za>
1 parent c880acd commit 569a4d9

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7 files changed

+352
-1
lines changed

7 files changed

+352
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lines changed

‎compiler/rustc_codegen_gcc/src/asm.rs‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -732,6 +732,8 @@ fn reg_class_to_gcc(reg_class: InlineAsmRegClass) -> &'static str {
732732
| X86InlineAsmRegClass::mmx_reg
733733
| X86InlineAsmRegClass::tmm_reg,
734734
) => unreachable!("clobber-only"),
735+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => "r",
736+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => "f",
735737
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
736738
bug!("GCC backend does not support SPIR-V")
737739
}
@@ -842,6 +844,8 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
842844
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
843845
bug!("GCC backend does not support SPIR-V")
844846
}
847+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => cx.type_i32(),
848+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => cx.type_f32(),
845849
InlineAsmRegClass::Err => unreachable!(),
846850
}
847851
}
@@ -1033,6 +1037,7 @@ fn modifier_to_gcc(
10331037
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
10341038
bug!("LLVM backend does not support SPIR-V")
10351039
}
1040+
InlineAsmRegClass::Xtensa(_) => None,
10361041
InlineAsmRegClass::Err => unreachable!(),
10371042
}
10381043
}

‎compiler/rustc_codegen_llvm/src/asm.rs‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -278,6 +278,7 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
278278
}
279279
InlineAsmArch::SpirV => {}
280280
InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => {}
281+
InlineAsmArch::Xtensa => {}
281282
InlineAsmArch::Bpf => {}
282283
InlineAsmArch::Msp430 => {
283284
constraints.push("~{sr}".to_string());
@@ -682,6 +683,8 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
682683
| X86InlineAsmRegClass::kreg0
683684
| X86InlineAsmRegClass::tmm_reg,
684685
) => unreachable!("clobber-only"),
686+
Xtensa(XtensaInlineAsmRegClass::freg) => "f",
687+
Xtensa(XtensaInlineAsmRegClass::reg) => "r",
685688
Wasm(WasmInlineAsmRegClass::local) => "r",
686689
Bpf(BpfInlineAsmRegClass::reg) => "r",
687690
Bpf(BpfInlineAsmRegClass::wreg) => "w",
@@ -787,6 +790,7 @@ fn modifier_to_llvm(
787790
| X86InlineAsmRegClass::kreg0
788791
| X86InlineAsmRegClass::tmm_reg,
789792
) => unreachable!("clobber-only"),
793+
Xtensa(_) => None,
790794
Wasm(WasmInlineAsmRegClass::local) => None,
791795
Bpf(_) => None,
792796
Avr(AvrInlineAsmRegClass::reg_pair)
@@ -862,6 +866,8 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
862866
| X86InlineAsmRegClass::kreg0
863867
| X86InlineAsmRegClass::tmm_reg,
864868
) => unreachable!("clobber-only"),
869+
Xtensa(XtensaInlineAsmRegClass::reg) => cx.type_i32(),
870+
Xtensa(XtensaInlineAsmRegClass::freg) => cx.type_f32(),
865871
Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
866872
Bpf(BpfInlineAsmRegClass::reg) => cx.type_i64(),
867873
Bpf(BpfInlineAsmRegClass::wreg) => cx.type_i32(),

‎compiler/rustc_span/src/symbol.rs‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -525,6 +525,7 @@ symbols! {
525525
async_iterator,
526526
async_iterator_poll_next,
527527
async_trait_bounds,
528+
atomctl,
528529
atomic,
529530
atomic_and,
530531
atomic_cxchg,
@@ -768,6 +769,7 @@ symbols! {
768769
contracts_requires,
769770
convert,
770771
convert_identity,
772+
coprocessor,
771773
copy,
772774
copy_closures,
773775
copy_nonoverlapping,
@@ -954,6 +956,7 @@ symbols! {
954956
ermsb_target_feature,
955957
exact_div,
956958
except,
959+
exception,
957960
exception_handling: "exception-handling",
958961
exchange_malloc,
959962
exclusive_range_pattern,
@@ -980,6 +983,7 @@ symbols! {
980983
expr_fragment_specifier_2024,
981984
extended_key_value_attributes,
982985
extended_varargs_abi_support,
986+
extendedl32r,
983987
extern_absolute_paths,
984988
extern_crate_item_prelude,
985989
extern_crate_self,
@@ -1097,6 +1101,9 @@ symbols! {
10971101
format_argument,
10981102
format_arguments,
10991103
format_macro,
1104+
format_placeholder,
1105+
format_unsafe_arg,
1106+
fp,
11001107
framework,
11011108
freeze,
11021109
freeze_impls,
@@ -1170,6 +1177,7 @@ symbols! {
11701177
hexagon_target_feature,
11711178
hidden,
11721179
hide,
1180+
highpriinterrupts,
11731181
hint,
11741182
homogeneous_aggregate,
11751183
host,
@@ -1256,6 +1264,7 @@ symbols! {
12561264
integral,
12571265
internal,
12581266
internal_features,
1267+
interrupt,
12591268
into_async_iter_into_iter,
12601269
into_future,
12611270
into_iter,
@@ -1362,6 +1371,7 @@ symbols! {
13621371
lt,
13631372
m68k,
13641373
m68k_target_feature,
1374+
mac16,
13651375
macro_at_most_once_rep,
13661376
macro_attr,
13671377
macro_attributes_in_derive_output,
@@ -1415,6 +1425,7 @@ symbols! {
14151425
mem_variant_count,
14161426
mem_zeroed,
14171427
member_constraints,
1428+
memctl,
14181429
memory,
14191430
memtag,
14201431
message,
@@ -1477,6 +1488,8 @@ symbols! {
14771488
mir_unwind_unreachable,
14781489
mir_variant,
14791490
miri,
1491+
misc,
1492+
miscsr,
14801493
mmx_reg,
14811494
modifiers,
14821495
module,
@@ -1731,6 +1744,8 @@ symbols! {
17311744
prelude_import,
17321745
preserves_flags,
17331746
prfchw_target_feature,
1747+
prid,
1748+
primitive,
17341749
print_macro,
17351750
println_macro,
17361751
proc_dash_macro: "proc-macro",
@@ -2001,8 +2016,10 @@ symbols! {
20012016
rustdoc_missing_doc_code_examples,
20022017
rustfmt,
20032018
rvalue_static_promotion,
2019+
rvector,
20042020
rwpi,
20052021
s,
2022+
s32c1i,
20062023
s390x,
20072024
s390x_target_feature,
20082025
s390x_target_feature_vector,
@@ -2245,9 +2262,12 @@ symbols! {
22452262
thread,
22462263
thread_local,
22472264
thread_local_macro,
2265+
threadptr,
22482266
three_way_compare,
22492267
thumb2,
22502268
thumb_mode: "thumb-mode",
2269+
time,
2270+
timerint,
22512271
tmm_reg,
22522272
to_owned_method,
22532273
to_string,
@@ -2467,6 +2487,7 @@ symbols! {
24672487
while_let,
24682488
whole_dash_archive: "whole-archive",
24692489
width,
2490+
windowed,
24702491
windows,
24712492
windows_subsystem,
24722493
with_negative_coherence,
@@ -2490,9 +2511,11 @@ symbols! {
24902511
x87_reg,
24912512
x87_target_feature,
24922513
xer,
2514+
xloop,
24932515
xmm_reg,
24942516
xop_target_feature,
24952517
xtensa,
2518+
xtensa_target_feature,
24962519
yeet_desugar_details,
24972520
yeet_expr,
24982521
yes,

‎compiler/rustc_target/src/asm/mod.rs‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -194,6 +194,7 @@ mod sparc;
194194
mod spirv;
195195
mod wasm;
196196
mod x86;
197+
mod xtensa;
197198

198199
pub use aarch64::{AArch64InlineAsmReg, AArch64InlineAsmRegClass};
199200
pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass};
@@ -213,6 +214,7 @@ pub use sparc::{SparcInlineAsmReg, SparcInlineAsmRegClass};
213214
pub use spirv::{SpirVInlineAsmReg, SpirVInlineAsmRegClass};
214215
pub use wasm::{WasmInlineAsmReg, WasmInlineAsmRegClass};
215216
pub use x86::{X86InlineAsmReg, X86InlineAsmRegClass};
217+
pub use xtensa::{XtensaInlineAsmReg, XtensaInlineAsmRegClass};
216218

217219
#[derive(Copy, Clone, Encodable, Decodable, Debug, Eq, PartialEq, Hash)]
218220
pub enum InlineAsmArch {
@@ -237,6 +239,7 @@ pub enum InlineAsmArch {
237239
SpirV,
238240
Wasm32,
239241
Wasm64,
242+
Xtensa,
240243
Bpf,
241244
Avr,
242245
Msp430,
@@ -294,6 +297,7 @@ pub enum InlineAsmReg {
294297
Sparc(SparcInlineAsmReg),
295298
SpirV(SpirVInlineAsmReg),
296299
Wasm(WasmInlineAsmReg),
300+
Xtensa(XtensaInlineAsmReg),
297301
Bpf(BpfInlineAsmReg),
298302
Avr(AvrInlineAsmReg),
299303
Msp430(Msp430InlineAsmReg),
@@ -316,6 +320,7 @@ impl InlineAsmReg {
316320
Self::Mips(r) => r.name(),
317321
Self::S390x(r) => r.name(),
318322
Self::Sparc(r) => r.name(),
323+
Self::Xtensa(r) => r.name(),
319324
Self::Bpf(r) => r.name(),
320325
Self::Avr(r) => r.name(),
321326
Self::Msp430(r) => r.name(),
@@ -337,6 +342,7 @@ impl InlineAsmReg {
337342
Self::Mips(r) => InlineAsmRegClass::Mips(r.reg_class()),
338343
Self::S390x(r) => InlineAsmRegClass::S390x(r.reg_class()),
339344
Self::Sparc(r) => InlineAsmRegClass::Sparc(r.reg_class()),
345+
Self::Xtensa(r) => InlineAsmRegClass::Xtensa(r.reg_class()),
340346
Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
341347
Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
342348
Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()),
@@ -370,6 +376,7 @@ impl InlineAsmReg {
370376
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
371377
Self::Mips(MipsInlineAsmReg::parse(name)?)
372378
}
379+
InlineAsmArch::Xtensa => Self::Xtensa(XtensaInlineAsmReg::parse(name)?),
373380
InlineAsmArch::S390x => Self::S390x(S390xInlineAsmReg::parse(name)?),
374381
InlineAsmArch::Sparc | InlineAsmArch::Sparc64 => {
375382
Self::Sparc(SparcInlineAsmReg::parse(name)?)
@@ -409,6 +416,7 @@ impl InlineAsmReg {
409416
Self::Sparc(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
410417
Self::Bpf(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
411418
Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
419+
Self::Xtensa(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
412420
Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
413421
Self::M68k(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
414422
Self::CSKY(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
@@ -435,6 +443,7 @@ impl InlineAsmReg {
435443
Self::Mips(r) => r.emit(out, arch, modifier),
436444
Self::S390x(r) => r.emit(out, arch, modifier),
437445
Self::Sparc(r) => r.emit(out, arch, modifier),
446+
Self::Xtensa(r) => r.emit(out, arch, modifier),
438447
Self::Bpf(r) => r.emit(out, arch, modifier),
439448
Self::Avr(r) => r.emit(out, arch, modifier),
440449
Self::Msp430(r) => r.emit(out, arch, modifier),
@@ -456,6 +465,7 @@ impl InlineAsmReg {
456465
Self::Mips(_) => cb(self),
457466
Self::S390x(r) => r.overlapping_regs(|r| cb(Self::S390x(r))),
458467
Self::Sparc(_) => cb(self),
468+
Self::Xtensa(_) => cb(self),
459469
Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
460470
Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
461471
Self::Msp430(_) => cb(self),
@@ -482,6 +492,7 @@ pub enum InlineAsmRegClass {
482492
Sparc(SparcInlineAsmRegClass),
483493
SpirV(SpirVInlineAsmRegClass),
484494
Wasm(WasmInlineAsmRegClass),
495+
Xtensa(XtensaInlineAsmRegClass),
485496
Bpf(BpfInlineAsmRegClass),
486497
Avr(AvrInlineAsmRegClass),
487498
Msp430(Msp430InlineAsmRegClass),
@@ -507,6 +518,7 @@ impl InlineAsmRegClass {
507518
Self::Sparc(r) => r.name(),
508519
Self::SpirV(r) => r.name(),
509520
Self::Wasm(r) => r.name(),
521+
Self::Xtensa(r) => r.name(),
510522
Self::Bpf(r) => r.name(),
511523
Self::Avr(r) => r.name(),
512524
Self::Msp430(r) => r.name(),
@@ -534,6 +546,7 @@ impl InlineAsmRegClass {
534546
Self::Sparc(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Sparc),
535547
Self::SpirV(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::SpirV),
536548
Self::Wasm(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Wasm),
549+
Self::Xtensa(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Xtensa),
537550
Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
538551
Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
539552
Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430),
@@ -564,6 +577,7 @@ impl InlineAsmRegClass {
564577
Self::Sparc(r) => r.suggest_modifier(arch, ty),
565578
Self::SpirV(r) => r.suggest_modifier(arch, ty),
566579
Self::Wasm(r) => r.suggest_modifier(arch, ty),
580+
Self::Xtensa(r) => r.suggest_modifier(arch, ty),
567581
Self::Bpf(r) => r.suggest_modifier(arch, ty),
568582
Self::Avr(r) => r.suggest_modifier(arch, ty),
569583
Self::Msp430(r) => r.suggest_modifier(arch, ty),
@@ -594,6 +608,7 @@ impl InlineAsmRegClass {
594608
Self::Sparc(r) => r.default_modifier(arch),
595609
Self::SpirV(r) => r.default_modifier(arch),
596610
Self::Wasm(r) => r.default_modifier(arch),
611+
Self::Xtensa(r) => r.default_modifier(arch),
597612
Self::Bpf(r) => r.default_modifier(arch),
598613
Self::Avr(r) => r.default_modifier(arch),
599614
Self::Msp430(r) => r.default_modifier(arch),
@@ -627,6 +642,7 @@ impl InlineAsmRegClass {
627642
Self::Sparc(r) => r.supported_types(arch),
628643
Self::SpirV(r) => r.supported_types(arch),
629644
Self::Wasm(r) => r.supported_types(arch),
645+
Self::Xtensa(r) => r.supported_types(arch),
630646
Self::Bpf(r) => r.supported_types(arch),
631647
Self::Avr(r) => r.supported_types(arch),
632648
Self::Msp430(r) => r.supported_types(arch),
@@ -669,6 +685,7 @@ impl InlineAsmRegClass {
669685
}
670686
InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(name)?),
671687
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?),
688+
InlineAsmArch::Xtensa => Self::Xtensa(XtensaInlineAsmRegClass::parse(name)?),
672689
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?),
673690
InlineAsmArch::M68k => Self::M68k(M68kInlineAsmRegClass::parse(name)?),
674691
InlineAsmArch::CSKY => Self::CSKY(CSKYInlineAsmRegClass::parse(name)?),
@@ -692,6 +709,7 @@ impl InlineAsmRegClass {
692709
Self::Sparc(r) => r.valid_modifiers(arch),
693710
Self::SpirV(r) => r.valid_modifiers(arch),
694711
Self::Wasm(r) => r.valid_modifiers(arch),
712+
Self::Xtensa(r) => r.valid_modifiers(arch),
695713
Self::Bpf(r) => r.valid_modifiers(arch),
696714
Self::Avr(r) => r.valid_modifiers(arch),
697715
Self::Msp430(r) => r.valid_modifiers(arch),
@@ -893,6 +911,11 @@ pub fn allocatable_registers(
893911
wasm::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
894912
map
895913
}
914+
InlineAsmArch::Xtensa => {
915+
let mut map = xtensa::regclass_map();
916+
xtensa::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
917+
map
918+
}
896919
InlineAsmArch::Bpf => {
897920
let mut map = bpf::regclass_map();
898921
bpf::fill_reg_map(arch, reloc_model, target_features, target, &mut map);

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