@@ -48,11 +48,10 @@ impl<'bcx, 'tcx> MirContext<'bcx, 'tcx> {
4848 }
4949
5050 mir:: Terminator :: Switch { ref discr, ref adt_def, ref targets } => {
51- let adt_ty = bcx. tcx ( ) . lookup_item_type ( adt_def. did ) . ty ;
52- let represented_ty = adt:: represent_type ( bcx. ccx ( ) , adt_ty) ;
53-
5451 let discr_lvalue = self . trans_lvalue ( bcx, discr) ;
55- let discr = adt:: trans_get_discr ( bcx, & represented_ty, discr_lvalue. llval , None ) ;
52+ let ty = discr_lvalue. ty . to_ty ( bcx. tcx ( ) ) ;
53+ let repr = adt:: represent_type ( bcx. ccx ( ) , ty) ;
54+ let discr = adt:: trans_get_discr ( bcx, & repr, discr_lvalue. llval , None ) ;
5655
5756 // The else branch of the Switch can't be hit, so branch to an unreachable
5857 // instruction so LLVM knows that
@@ -61,7 +60,7 @@ impl<'bcx, 'tcx> MirContext<'bcx, 'tcx> {
6160 let switch = build:: Switch ( bcx, discr, unreachable_blk. llbb , targets. len ( ) ) ;
6261 assert_eq ! ( adt_def. variants. len( ) , targets. len( ) ) ;
6362 for ( adt_variant, target) in adt_def. variants . iter ( ) . zip ( targets) {
64- let llval = adt:: trans_case ( bcx, & * represented_ty , adt_variant. disr_val ) ;
63+ let llval = adt:: trans_case ( bcx, & * repr , adt_variant. disr_val ) ;
6564 let llbb = self . llblock ( * target) ;
6665
6766 build:: AddCase ( switch, llval, llbb)
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