@@ -13229,14 +13229,7 @@ pub fn vmaxh_f16(a: f16, b: f16) -> f16 {
1322913229#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1323013230#[cfg_attr(test, assert_instr(fmaxnm))]
1323113231pub fn vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t {
13232- unsafe extern "unadjusted" {
13233- #[cfg_attr(
13234- any(target_arch = "aarch64", target_arch = "arm64ec"),
13235- link_name = "llvm.aarch64.neon.fmaxnm.v1f64"
13236- )]
13237- fn _vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t;
13238- }
13239- unsafe { _vmaxnm_f64(a, b) }
13232+ unsafe { simd_fmax(a, b) }
1324013233}
1324113234#[doc = "Floating-point Maximum Number (vector)"]
1324213235#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmq_f64)"]
@@ -13245,14 +13238,7 @@ pub fn vmaxnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t {
1324513238#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1324613239#[cfg_attr(test, assert_instr(fmaxnm))]
1324713240pub fn vmaxnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
13248- unsafe extern "unadjusted" {
13249- #[cfg_attr(
13250- any(target_arch = "aarch64", target_arch = "arm64ec"),
13251- link_name = "llvm.aarch64.neon.fmaxnm.v2f64"
13252- )]
13253- fn _vmaxnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t;
13254- }
13255- unsafe { _vmaxnmq_f64(a, b) }
13241+ unsafe { simd_fmax(a, b) }
1325613242}
1325713243#[doc = "Floating-point Maximum Number"]
1325813244#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxnmh_f16)"]
@@ -13670,14 +13656,7 @@ pub fn vminh_f16(a: f16, b: f16) -> f16 {
1367013656#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1367113657#[cfg_attr(test, assert_instr(fminnm))]
1367213658pub fn vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t {
13673- unsafe extern "unadjusted" {
13674- #[cfg_attr(
13675- any(target_arch = "aarch64", target_arch = "arm64ec"),
13676- link_name = "llvm.aarch64.neon.fminnm.v1f64"
13677- )]
13678- fn _vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t;
13679- }
13680- unsafe { _vminnm_f64(a, b) }
13659+ unsafe { simd_fmin(a, b) }
1368113660}
1368213661#[doc = "Floating-point Minimum Number (vector)"]
1368313662#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmq_f64)"]
@@ -13686,14 +13665,7 @@ pub fn vminnm_f64(a: float64x1_t, b: float64x1_t) -> float64x1_t {
1368613665#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1368713666#[cfg_attr(test, assert_instr(fminnm))]
1368813667pub fn vminnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t {
13689- unsafe extern "unadjusted" {
13690- #[cfg_attr(
13691- any(target_arch = "aarch64", target_arch = "arm64ec"),
13692- link_name = "llvm.aarch64.neon.fminnm.v2f64"
13693- )]
13694- fn _vminnmq_f64(a: float64x2_t, b: float64x2_t) -> float64x2_t;
13695- }
13696- unsafe { _vminnmq_f64(a, b) }
13668+ unsafe { simd_fmin(a, b) }
1369713669}
1369813670#[doc = "Floating-point Minimum Number"]
1369913671#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminnmh_f16)"]
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