fmt

Author: The Miri Cronjob Bot

src/tools/miri/src/shims/foreign_items.rs

@@ -800,10 +800,7 @@ trait EvalContextExtPriv<'tcx>: crate::MiriInterpCxExt<'tcx> {
 
             // Target-specific shims
             name if name.starts_with("llvm.x86.")
-                && matches!(
-                    this.tcx.sess.target.arch,
-                    Arch::X86 | Arch::X86_64
-                ) =>
+                && matches!(this.tcx.sess.target.arch, Arch::X86 | Arch::X86_64) =>
             {
                 return shims::x86::EvalContextExt::emulate_x86_intrinsic(
                     this, link_name, abi, args, dest,

src/tools/miri/src/shims/x86/mod.rs

@@ -42,9 +42,7 @@ pub(super) trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
             // https://www.intel.com/content/www/us/en/docs/cpp-compiler/developer-guide-reference/2021-8/addcarry-u32-addcarry-u64.html
             // https://www.intel.com/content/www/us/en/docs/cpp-compiler/developer-guide-reference/2021-8/subborrow-u32-subborrow-u64.html
             "addcarry.32" | "addcarry.64" | "subborrow.32" | "subborrow.64" => {
-                if unprefixed_name.ends_with("64")
-                    && this.tcx.sess.target.arch != Arch::X86_64
-                {
+                if unprefixed_name.ends_with("64") && this.tcx.sess.target.arch != Arch::X86_64 {
                     return interp_ok(EmulateItemResult::NotSupported);
                 }
 

src/tools/miri/tests/fail/intrinsics/simd_masked_load_element_misaligned.rs

@@ -6,7 +6,7 @@ use std::simd::*;
 fn main() {
     unsafe {
         let buf = [0u32; 5];
-        //~v ERROR: accessing memory with alignment 
+        //~v ERROR: accessing memory with alignment
         simd_masked_load::<_, _, _, { SimdAlign::Element }>(
             i32x4::splat(-1),
             // This is not i32-aligned