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aarch64: use simd_reduce_min and simd_reduce_max for integers
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+28
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‎library/stdarch/crates/core_arch/src/aarch64/neon/generated.rs‎

Lines changed: 24 additions & 192 deletions
Original file line numberDiff line numberDiff line change
@@ -13381,14 +13381,7 @@ pub fn vmaxvq_f64(a: float64x2_t) -> f64 {
1338113381
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1338213382
#[cfg_attr(test, assert_instr(smaxv))]
1338313383
pub fn vmaxv_s8(a: int8x8_t) -> i8 {
13384-
unsafe extern "unadjusted" {
13385-
#[cfg_attr(
13386-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13387-
link_name = "llvm.aarch64.neon.smaxv.i8.v8i8"
13388-
)]
13389-
fn _vmaxv_s8(a: int8x8_t) -> i8;
13390-
}
13391-
unsafe { _vmaxv_s8(a) }
13384+
unsafe { simd_reduce_max(a) }
1339213385
}
1339313386
#[doc = "Horizontal vector max."]
1339413387
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s8)"]
@@ -13397,14 +13390,7 @@ pub fn vmaxv_s8(a: int8x8_t) -> i8 {
1339713390
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1339813391
#[cfg_attr(test, assert_instr(smaxv))]
1339913392
pub fn vmaxvq_s8(a: int8x16_t) -> i8 {
13400-
unsafe extern "unadjusted" {
13401-
#[cfg_attr(
13402-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13403-
link_name = "llvm.aarch64.neon.smaxv.i8.v16i8"
13404-
)]
13405-
fn _vmaxvq_s8(a: int8x16_t) -> i8;
13406-
}
13407-
unsafe { _vmaxvq_s8(a) }
13393+
unsafe { simd_reduce_max(a) }
1340813394
}
1340913395
#[doc = "Horizontal vector max."]
1341013396
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_s16)"]
@@ -13413,14 +13399,7 @@ pub fn vmaxvq_s8(a: int8x16_t) -> i8 {
1341313399
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1341413400
#[cfg_attr(test, assert_instr(smaxv))]
1341513401
pub fn vmaxv_s16(a: int16x4_t) -> i16 {
13416-
unsafe extern "unadjusted" {
13417-
#[cfg_attr(
13418-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13419-
link_name = "llvm.aarch64.neon.smaxv.i16.v4i16"
13420-
)]
13421-
fn _vmaxv_s16(a: int16x4_t) -> i16;
13422-
}
13423-
unsafe { _vmaxv_s16(a) }
13402+
unsafe { simd_reduce_max(a) }
1342413403
}
1342513404
#[doc = "Horizontal vector max."]
1342613405
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s16)"]
@@ -13429,14 +13408,7 @@ pub fn vmaxv_s16(a: int16x4_t) -> i16 {
1342913408
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1343013409
#[cfg_attr(test, assert_instr(smaxv))]
1343113410
pub fn vmaxvq_s16(a: int16x8_t) -> i16 {
13432-
unsafe extern "unadjusted" {
13433-
#[cfg_attr(
13434-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13435-
link_name = "llvm.aarch64.neon.smaxv.i16.v8i16"
13436-
)]
13437-
fn _vmaxvq_s16(a: int16x8_t) -> i16;
13438-
}
13439-
unsafe { _vmaxvq_s16(a) }
13411+
unsafe { simd_reduce_max(a) }
1344013412
}
1344113413
#[doc = "Horizontal vector max."]
1344213414
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_s32)"]
@@ -13445,14 +13417,7 @@ pub fn vmaxvq_s16(a: int16x8_t) -> i16 {
1344513417
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1344613418
#[cfg_attr(test, assert_instr(smaxp))]
1344713419
pub fn vmaxv_s32(a: int32x2_t) -> i32 {
13448-
unsafe extern "unadjusted" {
13449-
#[cfg_attr(
13450-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13451-
link_name = "llvm.aarch64.neon.smaxv.i32.v2i32"
13452-
)]
13453-
fn _vmaxv_s32(a: int32x2_t) -> i32;
13454-
}
13455-
unsafe { _vmaxv_s32(a) }
13420+
unsafe { simd_reduce_max(a) }
1345613421
}
1345713422
#[doc = "Horizontal vector max."]
1345813423
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_s32)"]
@@ -13461,14 +13426,7 @@ pub fn vmaxv_s32(a: int32x2_t) -> i32 {
1346113426
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1346213427
#[cfg_attr(test, assert_instr(smaxv))]
1346313428
pub fn vmaxvq_s32(a: int32x4_t) -> i32 {
13464-
unsafe extern "unadjusted" {
13465-
#[cfg_attr(
13466-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13467-
link_name = "llvm.aarch64.neon.smaxv.i32.v4i32"
13468-
)]
13469-
fn _vmaxvq_s32(a: int32x4_t) -> i32;
13470-
}
13471-
unsafe { _vmaxvq_s32(a) }
13429+
unsafe { simd_reduce_max(a) }
1347213430
}
1347313431
#[doc = "Horizontal vector max."]
1347413432
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u8)"]
@@ -13477,14 +13435,7 @@ pub fn vmaxvq_s32(a: int32x4_t) -> i32 {
1347713435
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1347813436
#[cfg_attr(test, assert_instr(umaxv))]
1347913437
pub fn vmaxv_u8(a: uint8x8_t) -> u8 {
13480-
unsafe extern "unadjusted" {
13481-
#[cfg_attr(
13482-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13483-
link_name = "llvm.aarch64.neon.umaxv.i8.v8i8"
13484-
)]
13485-
fn _vmaxv_u8(a: uint8x8_t) -> u8;
13486-
}
13487-
unsafe { _vmaxv_u8(a) }
13438+
unsafe { simd_reduce_max(a) }
1348813439
}
1348913440
#[doc = "Horizontal vector max."]
1349013441
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u8)"]
@@ -13493,14 +13444,7 @@ pub fn vmaxv_u8(a: uint8x8_t) -> u8 {
1349313444
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1349413445
#[cfg_attr(test, assert_instr(umaxv))]
1349513446
pub fn vmaxvq_u8(a: uint8x16_t) -> u8 {
13496-
unsafe extern "unadjusted" {
13497-
#[cfg_attr(
13498-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13499-
link_name = "llvm.aarch64.neon.umaxv.i8.v16i8"
13500-
)]
13501-
fn _vmaxvq_u8(a: uint8x16_t) -> u8;
13502-
}
13503-
unsafe { _vmaxvq_u8(a) }
13447+
unsafe { simd_reduce_max(a) }
1350413448
}
1350513449
#[doc = "Horizontal vector max."]
1350613450
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u16)"]
@@ -13509,14 +13453,7 @@ pub fn vmaxvq_u8(a: uint8x16_t) -> u8 {
1350913453
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1351013454
#[cfg_attr(test, assert_instr(umaxv))]
1351113455
pub fn vmaxv_u16(a: uint16x4_t) -> u16 {
13512-
unsafe extern "unadjusted" {
13513-
#[cfg_attr(
13514-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13515-
link_name = "llvm.aarch64.neon.umaxv.i16.v4i16"
13516-
)]
13517-
fn _vmaxv_u16(a: uint16x4_t) -> u16;
13518-
}
13519-
unsafe { _vmaxv_u16(a) }
13456+
unsafe { simd_reduce_max(a) }
1352013457
}
1352113458
#[doc = "Horizontal vector max."]
1352213459
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u16)"]
@@ -13525,14 +13462,7 @@ pub fn vmaxv_u16(a: uint16x4_t) -> u16 {
1352513462
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1352613463
#[cfg_attr(test, assert_instr(umaxv))]
1352713464
pub fn vmaxvq_u16(a: uint16x8_t) -> u16 {
13528-
unsafe extern "unadjusted" {
13529-
#[cfg_attr(
13530-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13531-
link_name = "llvm.aarch64.neon.umaxv.i16.v8i16"
13532-
)]
13533-
fn _vmaxvq_u16(a: uint16x8_t) -> u16;
13534-
}
13535-
unsafe { _vmaxvq_u16(a) }
13465+
unsafe { simd_reduce_max(a) }
1353613466
}
1353713467
#[doc = "Horizontal vector max."]
1353813468
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxv_u32)"]
@@ -13541,14 +13471,7 @@ pub fn vmaxvq_u16(a: uint16x8_t) -> u16 {
1354113471
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1354213472
#[cfg_attr(test, assert_instr(umaxp))]
1354313473
pub fn vmaxv_u32(a: uint32x2_t) -> u32 {
13544-
unsafe extern "unadjusted" {
13545-
#[cfg_attr(
13546-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13547-
link_name = "llvm.aarch64.neon.umaxv.i32.v2i32"
13548-
)]
13549-
fn _vmaxv_u32(a: uint32x2_t) -> u32;
13550-
}
13551-
unsafe { _vmaxv_u32(a) }
13474+
unsafe { simd_reduce_max(a) }
1355213475
}
1355313476
#[doc = "Horizontal vector max."]
1355413477
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmaxvq_u32)"]
@@ -13557,14 +13480,7 @@ pub fn vmaxv_u32(a: uint32x2_t) -> u32 {
1355713480
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1355813481
#[cfg_attr(test, assert_instr(umaxv))]
1355913482
pub fn vmaxvq_u32(a: uint32x4_t) -> u32 {
13560-
unsafe extern "unadjusted" {
13561-
#[cfg_attr(
13562-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13563-
link_name = "llvm.aarch64.neon.umaxv.i32.v4i32"
13564-
)]
13565-
fn _vmaxvq_u32(a: uint32x4_t) -> u32;
13566-
}
13567-
unsafe { _vmaxvq_u32(a) }
13483+
unsafe { simd_reduce_max(a) }
1356813484
}
1356913485
#[doc = "Minimum (vector)"]
1357013486
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmin_f64)"]
@@ -13773,14 +13689,7 @@ pub fn vminvq_f64(a: float64x2_t) -> f64 {
1377313689
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1377413690
#[cfg_attr(test, assert_instr(sminv))]
1377513691
pub fn vminv_s8(a: int8x8_t) -> i8 {
13776-
unsafe extern "unadjusted" {
13777-
#[cfg_attr(
13778-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13779-
link_name = "llvm.aarch64.neon.sminv.i8.v8i8"
13780-
)]
13781-
fn _vminv_s8(a: int8x8_t) -> i8;
13782-
}
13783-
unsafe { _vminv_s8(a) }
13692+
unsafe { simd_reduce_min(a) }
1378413693
}
1378513694
#[doc = "Horizontal vector min."]
1378613695
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s8)"]
@@ -13789,14 +13698,7 @@ pub fn vminv_s8(a: int8x8_t) -> i8 {
1378913698
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1379013699
#[cfg_attr(test, assert_instr(sminv))]
1379113700
pub fn vminvq_s8(a: int8x16_t) -> i8 {
13792-
unsafe extern "unadjusted" {
13793-
#[cfg_attr(
13794-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13795-
link_name = "llvm.aarch64.neon.sminv.i8.v16i8"
13796-
)]
13797-
fn _vminvq_s8(a: int8x16_t) -> i8;
13798-
}
13799-
unsafe { _vminvq_s8(a) }
13701+
unsafe { simd_reduce_min(a) }
1380013702
}
1380113703
#[doc = "Horizontal vector min."]
1380213704
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_s16)"]
@@ -13805,14 +13707,7 @@ pub fn vminvq_s8(a: int8x16_t) -> i8 {
1380513707
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1380613708
#[cfg_attr(test, assert_instr(sminv))]
1380713709
pub fn vminv_s16(a: int16x4_t) -> i16 {
13808-
unsafe extern "unadjusted" {
13809-
#[cfg_attr(
13810-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13811-
link_name = "llvm.aarch64.neon.sminv.i16.v4i16"
13812-
)]
13813-
fn _vminv_s16(a: int16x4_t) -> i16;
13814-
}
13815-
unsafe { _vminv_s16(a) }
13710+
unsafe { simd_reduce_min(a) }
1381613711
}
1381713712
#[doc = "Horizontal vector min."]
1381813713
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s16)"]
@@ -13821,14 +13716,7 @@ pub fn vminv_s16(a: int16x4_t) -> i16 {
1382113716
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1382213717
#[cfg_attr(test, assert_instr(sminv))]
1382313718
pub fn vminvq_s16(a: int16x8_t) -> i16 {
13824-
unsafe extern "unadjusted" {
13825-
#[cfg_attr(
13826-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13827-
link_name = "llvm.aarch64.neon.sminv.i16.v8i16"
13828-
)]
13829-
fn _vminvq_s16(a: int16x8_t) -> i16;
13830-
}
13831-
unsafe { _vminvq_s16(a) }
13719+
unsafe { simd_reduce_min(a) }
1383213720
}
1383313721
#[doc = "Horizontal vector min."]
1383413722
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_s32)"]
@@ -13837,14 +13725,7 @@ pub fn vminvq_s16(a: int16x8_t) -> i16 {
1383713725
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1383813726
#[cfg_attr(test, assert_instr(sminp))]
1383913727
pub fn vminv_s32(a: int32x2_t) -> i32 {
13840-
unsafe extern "unadjusted" {
13841-
#[cfg_attr(
13842-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13843-
link_name = "llvm.aarch64.neon.sminv.i32.v2i32"
13844-
)]
13845-
fn _vminv_s32(a: int32x2_t) -> i32;
13846-
}
13847-
unsafe { _vminv_s32(a) }
13728+
unsafe { simd_reduce_min(a) }
1384813729
}
1384913730
#[doc = "Horizontal vector min."]
1385013731
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_s32)"]
@@ -13853,14 +13734,7 @@ pub fn vminv_s32(a: int32x2_t) -> i32 {
1385313734
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1385413735
#[cfg_attr(test, assert_instr(sminv))]
1385513736
pub fn vminvq_s32(a: int32x4_t) -> i32 {
13856-
unsafe extern "unadjusted" {
13857-
#[cfg_attr(
13858-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13859-
link_name = "llvm.aarch64.neon.sminv.i32.v4i32"
13860-
)]
13861-
fn _vminvq_s32(a: int32x4_t) -> i32;
13862-
}
13863-
unsafe { _vminvq_s32(a) }
13737+
unsafe { simd_reduce_min(a) }
1386413738
}
1386513739
#[doc = "Horizontal vector min."]
1386613740
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u8)"]
@@ -13869,14 +13743,7 @@ pub fn vminvq_s32(a: int32x4_t) -> i32 {
1386913743
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1387013744
#[cfg_attr(test, assert_instr(uminv))]
1387113745
pub fn vminv_u8(a: uint8x8_t) -> u8 {
13872-
unsafe extern "unadjusted" {
13873-
#[cfg_attr(
13874-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13875-
link_name = "llvm.aarch64.neon.uminv.i8.v8i8"
13876-
)]
13877-
fn _vminv_u8(a: uint8x8_t) -> u8;
13878-
}
13879-
unsafe { _vminv_u8(a) }
13746+
unsafe { simd_reduce_min(a) }
1388013747
}
1388113748
#[doc = "Horizontal vector min."]
1388213749
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u8)"]
@@ -13885,14 +13752,7 @@ pub fn vminv_u8(a: uint8x8_t) -> u8 {
1388513752
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1388613753
#[cfg_attr(test, assert_instr(uminv))]
1388713754
pub fn vminvq_u8(a: uint8x16_t) -> u8 {
13888-
unsafe extern "unadjusted" {
13889-
#[cfg_attr(
13890-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13891-
link_name = "llvm.aarch64.neon.uminv.i8.v16i8"
13892-
)]
13893-
fn _vminvq_u8(a: uint8x16_t) -> u8;
13894-
}
13895-
unsafe { _vminvq_u8(a) }
13755+
unsafe { simd_reduce_min(a) }
1389613756
}
1389713757
#[doc = "Horizontal vector min."]
1389813758
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u16)"]
@@ -13901,14 +13761,7 @@ pub fn vminvq_u8(a: uint8x16_t) -> u8 {
1390113761
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1390213762
#[cfg_attr(test, assert_instr(uminv))]
1390313763
pub fn vminv_u16(a: uint16x4_t) -> u16 {
13904-
unsafe extern "unadjusted" {
13905-
#[cfg_attr(
13906-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13907-
link_name = "llvm.aarch64.neon.uminv.i16.v4i16"
13908-
)]
13909-
fn _vminv_u16(a: uint16x4_t) -> u16;
13910-
}
13911-
unsafe { _vminv_u16(a) }
13764+
unsafe { simd_reduce_min(a) }
1391213765
}
1391313766
#[doc = "Horizontal vector min."]
1391413767
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u16)"]
@@ -13917,14 +13770,7 @@ pub fn vminv_u16(a: uint16x4_t) -> u16 {
1391713770
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1391813771
#[cfg_attr(test, assert_instr(uminv))]
1391913772
pub fn vminvq_u16(a: uint16x8_t) -> u16 {
13920-
unsafe extern "unadjusted" {
13921-
#[cfg_attr(
13922-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13923-
link_name = "llvm.aarch64.neon.uminv.i16.v8i16"
13924-
)]
13925-
fn _vminvq_u16(a: uint16x8_t) -> u16;
13926-
}
13927-
unsafe { _vminvq_u16(a) }
13773+
unsafe { simd_reduce_min(a) }
1392813774
}
1392913775
#[doc = "Horizontal vector min."]
1393013776
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminv_u32)"]
@@ -13933,14 +13779,7 @@ pub fn vminvq_u16(a: uint16x8_t) -> u16 {
1393313779
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1393413780
#[cfg_attr(test, assert_instr(uminp))]
1393513781
pub fn vminv_u32(a: uint32x2_t) -> u32 {
13936-
unsafe extern "unadjusted" {
13937-
#[cfg_attr(
13938-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13939-
link_name = "llvm.aarch64.neon.uminv.i32.v2i32"
13940-
)]
13941-
fn _vminv_u32(a: uint32x2_t) -> u32;
13942-
}
13943-
unsafe { _vminv_u32(a) }
13782+
unsafe { simd_reduce_min(a) }
1394413783
}
1394513784
#[doc = "Horizontal vector min."]
1394613785
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vminvq_u32)"]
@@ -13949,14 +13788,7 @@ pub fn vminv_u32(a: uint32x2_t) -> u32 {
1394913788
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1395013789
#[cfg_attr(test, assert_instr(uminv))]
1395113790
pub fn vminvq_u32(a: uint32x4_t) -> u32 {
13952-
unsafe extern "unadjusted" {
13953-
#[cfg_attr(
13954-
any(target_arch = "aarch64", target_arch = "arm64ec"),
13955-
link_name = "llvm.aarch64.neon.uminv.i32.v4i32"
13956-
)]
13957-
fn _vminvq_u32(a: uint32x4_t) -> u32;
13958-
}
13959-
unsafe { _vminvq_u32(a) }
13791+
unsafe { simd_reduce_min(a) }
1396013792
}
1396113793
#[doc = "Floating-point multiply-add to accumulator"]
1396213794
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vmla_f64)"]

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