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bjorn3bjorn3
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Sync from rust 843f8ce 
2 parents 28eb849 + 2073d12 commit 0e41b63

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5 files changed

+49
-27
lines changed

5 files changed

+49
-27
lines changed

‎src/abi/mod.rs‎

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@ use rustc_middle::ty::print::with_no_trimmed_paths;
2222
use rustc_session::Session;
2323
use rustc_span::source_map::Spanned;
2424
use rustc_target::callconv::{FnAbi, PassMode};
25+
use rustc_target::spec::Arch;
2526
use smallvec::{SmallVec, smallvec};
2627

2728
use self::pass_mode::*;
@@ -159,7 +160,7 @@ impl<'tcx> FunctionCx<'_, '_, 'tcx> {
159160
let ret = self.lib_call_unadjusted(name, params, returns, &args)[0];
160161

161162
Cow::Owned(vec![codegen_bitcast(self, types::I128, ret)])
162-
} else if ret_single_i128 && self.tcx.sess.target.arch == "s390x" {
163+
} else if ret_single_i128 && self.tcx.sess.target.arch == Arch::S390x {
163164
// Return i128 using a return area pointer on s390x.
164165
let mut params = params;
165166
let mut args = args.to_vec();
@@ -633,7 +634,7 @@ pub(crate) fn codegen_terminator_call<'tcx>(
633634
.flat_map(|arg_abi| arg_abi.get_abi_param(fx.tcx).into_iter()),
634635
);
635636

636-
if fx.tcx.sess.target.is_like_darwin && fx.tcx.sess.target.arch == "aarch64" {
637+
if fx.tcx.sess.target.is_like_darwin && fx.tcx.sess.target.arch == Arch::AArch64 {
637638
// Add any padding arguments needed for Apple AArch64.
638639
// There's no need to pad the argument list unless variadic arguments are actually being
639640
// passed.
@@ -915,25 +916,25 @@ pub(crate) fn codegen_call_with_unwind_action(
915916
pub(crate) fn lib_call_arg_param(tcx: TyCtxt<'_>, ty: Type, is_signed: bool) -> AbiParam {
916917
let param = AbiParam::new(ty);
917918
if ty.is_int() && u64::from(ty.bits()) < tcx.data_layout.pointer_size().bits() {
918-
match (&*tcx.sess.target.arch, &*tcx.sess.target.vendor) {
919-
("x86_64", _) | ("aarch64", "apple") => match (ty, is_signed) {
919+
match (&tcx.sess.target.arch, tcx.sess.target.vendor.as_ref()) {
920+
(Arch::X86_64, _) | (Arch::AArch64, "apple") => match (ty, is_signed) {
920921
(types::I8 | types::I16, true) => param.sext(),
921922
(types::I8 | types::I16, false) => param.uext(),
922923
_ => param,
923924
},
924-
("aarch64", _) => param,
925-
("riscv64", _) => match (ty, is_signed) {
925+
(Arch::AArch64, _) => param,
926+
(Arch::RiscV64, _) => match (ty, is_signed) {
926927
(types::I32, _) | (_, true) => param.sext(),
927928
_ => param.uext(),
928929
},
929-
("s390x", _) => {
930+
(Arch::S390x, _) => {
930931
if is_signed {
931932
param.sext()
932933
} else {
933934
param.uext()
934935
}
935936
}
936-
_ => unimplemented!("{:?}", tcx.sess.target.arch),
937+
(arch, _) => unimplemented!("{arch:?}"),
937938
}
938939
} else {
939940
param

‎src/codegen_f16_f128.rs‎

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
1+
use rustc_target::spec::Arch;
2+
13
use crate::compiler_builtins::CMP_RESULT_TY;
24
use crate::prelude::*;
35

46
pub(crate) fn f16_to_f32(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
57
let (value, arg_ty) =
6-
if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
8+
if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == Arch::X86_64 {
79
(
810
fx.bcx.ins().bitcast(types::I16, MemFlags::new(), value),
911
lib_call_arg_param(fx.tcx, types::I16, false),
@@ -20,7 +22,8 @@ fn f16_to_f64(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
2022
}
2123

2224
pub(crate) fn f32_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
23-
let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
25+
let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == Arch::X86_64
26+
{
2427
types::I16
2528
} else {
2629
types::F16
@@ -35,7 +38,8 @@ pub(crate) fn f32_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value
3538
}
3639

3740
fn f64_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
38-
let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
41+
let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == Arch::X86_64
42+
{
3943
types::I16
4044
} else {
4145
types::F16

‎src/common.rs‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@ use rustc_middle::ty::layout::{
99
use rustc_span::Symbol;
1010
use rustc_span::source_map::Spanned;
1111
use rustc_target::callconv::FnAbi;
12-
use rustc_target::spec::{HasTargetSpec, Target};
12+
use rustc_target::spec::{Arch, HasTargetSpec, Target};
1313

1414
use crate::constant::ConstantCx;
1515
use crate::debuginfo::FunctionDebugContext;
@@ -378,7 +378,7 @@ impl<'tcx> FunctionCx<'_, '_, 'tcx> {
378378
"size must be a multiple of alignment (size={size}, align={align})"
379379
);
380380

381-
let abi_align = if self.tcx.sess.target.arch == "s390x" { 8 } else { 16 };
381+
let abi_align = if self.tcx.sess.target.arch == Arch::S390x { 8 } else { 16 };
382382
if align <= abi_align {
383383
let stack_slot = self.bcx.create_sized_stack_slot(StackSlotData {
384384
kind: StackSlotKind::ExplicitSlot,

‎src/intrinsics/simd.rs‎

Lines changed: 21 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,7 @@
22
33
use cranelift_codegen::ir::immediates::Offset32;
44
use rustc_abi::Endian;
5+
use rustc_middle::ty::SimdAlign;
56

67
use super::*;
78
use crate::prelude::*;
@@ -960,6 +961,15 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
960961
let lane_clif_ty = fx.clif_type(val_lane_ty).unwrap();
961962
let ptr_val = ptr.load_scalar(fx);
962963

964+
let alignment = generic_args[3].expect_const().to_value().valtree.unwrap_branch()[0]
965+
.unwrap_leaf()
966+
.to_simd_alignment();
967+
968+
let memflags = match alignment {
969+
SimdAlign::Unaligned => MemFlags::new().with_notrap(),
970+
_ => MemFlags::trusted(),
971+
};
972+
963973
for lane_idx in 0..val_lane_count {
964974
let val_lane = val.value_lane(fx, lane_idx).load_scalar(fx);
965975
let mask_lane = mask.value_lane(fx, lane_idx).load_scalar(fx);
@@ -972,7 +982,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
972982

973983
fx.bcx.switch_to_block(if_enabled);
974984
let offset = lane_idx as i32 * lane_clif_ty.bytes() as i32;
975-
fx.bcx.ins().store(MemFlags::trusted(), val_lane, ptr_val, Offset32::new(offset));
985+
fx.bcx.ins().store(memflags, val_lane, ptr_val, Offset32::new(offset));
976986
fx.bcx.ins().jump(next, &[]);
977987

978988
fx.bcx.seal_block(next);
@@ -996,6 +1006,15 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
9961006
let lane_clif_ty = fx.clif_type(val_lane_ty).unwrap();
9971007
let ret_lane_layout = fx.layout_of(ret_lane_ty);
9981008

1009+
let alignment = generic_args[3].expect_const().to_value().valtree.unwrap_branch()[0]
1010+
.unwrap_leaf()
1011+
.to_simd_alignment();
1012+
1013+
let memflags = match alignment {
1014+
SimdAlign::Unaligned => MemFlags::new().with_notrap(),
1015+
_ => MemFlags::trusted(),
1016+
};
1017+
9991018
for lane_idx in 0..ptr_lane_count {
10001019
let val_lane = val.value_lane(fx, lane_idx).load_scalar(fx);
10011020
let ptr_lane = ptr.value_lane(fx, lane_idx).load_scalar(fx);
@@ -1011,7 +1030,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
10111030
fx.bcx.seal_block(if_disabled);
10121031

10131032
fx.bcx.switch_to_block(if_enabled);
1014-
let res = fx.bcx.ins().load(lane_clif_ty, MemFlags::trusted(), ptr_lane, 0);
1033+
let res = fx.bcx.ins().load(lane_clif_ty, memflags, ptr_lane, 0);
10151034
fx.bcx.ins().jump(next, &[res.into()]);
10161035

10171036
fx.bcx.switch_to_block(if_disabled);

‎src/lib.rs‎

Lines changed: 10 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,6 @@
11
// tidy-alphabetical-start
22
#![allow(rustc::diagnostic_outside_of_impl)]
33
#![allow(rustc::untranslatable_diagnostic)]
4-
#![cfg_attr(doc, allow(internal_features))]
5-
#![cfg_attr(doc, doc(rust_logo))]
6-
#![cfg_attr(doc, feature(rustdoc_internals))]
74
// Note: please avoid adding other feature gates where possible
85
#![feature(rustc_private)]
96
// Only used to define intrinsics in `compiler_builtins.rs`.
@@ -52,6 +49,7 @@ use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
5249
use rustc_session::Session;
5350
use rustc_session::config::OutputFilenames;
5451
use rustc_span::{Symbol, sym};
52+
use rustc_target::spec::Arch;
5553

5654
pub use crate::config::*;
5755
use crate::prelude::*;
@@ -164,28 +162,28 @@ impl CodegenBackend for CraneliftCodegenBackend {
164162

165163
fn target_config(&self, sess: &Session) -> TargetConfig {
166164
// FIXME return the actually used target features. this is necessary for #[cfg(target_feature)]
167-
let target_features = if sess.target.arch == "x86_64" && sess.target.os != "none" {
168-
// x86_64 mandates SSE2 support and rustc requires the x87 feature to be enabled
169-
vec![sym::fxsr, sym::sse, sym::sse2, Symbol::intern("x87")]
170-
} else if sess.target.arch == "aarch64" {
171-
match &*sess.target.os {
165+
let target_features = match sess.target.arch {
166+
Arch::X86_64 if sess.target.os != "none" => {
167+
// x86_64 mandates SSE2 support and rustc requires the x87 feature to be enabled
168+
vec![sym::fxsr, sym::sse, sym::sse2, Symbol::intern("x87")]
169+
}
170+
Arch::AArch64 => match &*sess.target.os {
172171
"none" => vec![],
173172
// On macOS the aes, sha2 and sha3 features are enabled by default and ring
174173
// fails to compile on macOS when they are not present.
175174
"macos" => vec![sym::neon, sym::aes, sym::sha2, sym::sha3],
176175
// AArch64 mandates Neon support
177176
_ => vec![sym::neon],
178-
}
179-
} else {
180-
vec![]
177+
},
178+
_ => vec![],
181179
};
182180
// FIXME do `unstable_target_features` properly
183181
let unstable_target_features = target_features.clone();
184182

185183
// FIXME(f16_f128): `rustc_codegen_llvm` currently disables support on Windows GNU
186184
// targets due to GCC using a different ABI than LLVM. Therefore `f16` and `f128`
187185
// won't be available when using a LLVM-built sysroot.
188-
let has_reliable_f16_f128 = !(sess.target.arch == "x86_64"
186+
let has_reliable_f16_f128 = !(sess.target.arch == Arch::X86_64
189187
&& sess.target.os == "windows"
190188
&& sess.target.env == "gnu"
191189
&& sess.target.abi != "llvm");

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