Fix lints

Author: calebzulawski

crates/core_simd/src/masks/to_bitmask.rs

@@ -74,6 +74,7 @@ impl_integer_intrinsic! {
 
 /// Returns the minimum number of bytes in a bitmask with `lanes` lanes.
 #[cfg(feature = "generic_const_exprs")]
+#[allow(clippy::missing_inline_in_public_items)]
 pub const fn bitmask_len(lanes: usize) -> usize {
     (lanes + 7) / 8
 }

crates/core_simd/src/ops/shift_scalar.rs

@@ -10,6 +10,7 @@ macro_rules! impl_splatted_shifts {
             LaneCount<N>: SupportedLaneCount,
         {
             type Output = Self;
+            #[inline]
             fn $trait_fn(self, rhs: $ty) -> Self::Output {
                 self.$trait_fn(Simd::splat(rhs))
             }
@@ -20,6 +21,7 @@ macro_rules! impl_splatted_shifts {
             LaneCount<N>: SupportedLaneCount,
         {
             type Output = Self;
+            #[inline]
             fn $trait_fn(self, rhs: &$ty) -> Self::Output {
                 self.$trait_fn(Simd::splat(*rhs))
             }
@@ -30,6 +32,7 @@ macro_rules! impl_splatted_shifts {
             LaneCount<N>: SupportedLaneCount,
         {
             type Output = Simd<$ty, N>;
+            #[inline]
             fn $trait_fn(self, rhs: $ty) -> Self::Output {
                 self.$trait_fn(Simd::splat(rhs))
             }
@@ -40,6 +43,7 @@ macro_rules! impl_splatted_shifts {
             LaneCount<N>: SupportedLaneCount,
         {
             type Output = Simd<$ty, N>;
+            #[inline]
             fn $trait_fn(self, rhs: &$ty) -> Self::Output {
                 self.$trait_fn(Simd::splat(*rhs))
             }

crates/core_simd/src/to_bytes.rs

@@ -9,13 +9,15 @@ macro_rules! impl_to_bytes {
         {
             /// Return the memory representation of this integer as a byte array in native byte
             /// order.
+            #[inline]
             pub fn to_ne_bytes(self) -> crate::simd::Simd<u8, {{ $size * LANES }}> {
                 // Safety: transmuting between vectors is safe
                 unsafe { core::mem::transmute_copy(&self) }
             }
 
             /// Return the memory representation of this integer as a byte array in big-endian
             /// (network) byte order.
+            #[inline]
             pub fn to_be_bytes(self) -> crate::simd::Simd<u8, {{ $size * LANES }}> {
                 let bytes = self.to_ne_bytes();
                 if cfg!(target_endian = "big") {
@@ -27,6 +29,7 @@ macro_rules! impl_to_bytes {
 
             /// Return the memory representation of this integer as a byte array in little-endian
             /// byte order.
+            #[inline]
             pub fn to_le_bytes(self) -> crate::simd::Simd<u8, {{ $size * LANES }}> {
                 let bytes = self.to_ne_bytes();
                 if cfg!(target_endian = "little") {
@@ -38,12 +41,14 @@ macro_rules! impl_to_bytes {
 
             /// Create a native endian integer value from its memory representation as a byte array
             /// in native endianness.
+            #[inline]
             pub fn from_ne_bytes(bytes: crate::simd::Simd<u8, {{ $size * LANES }}>) -> Self {
                 // Safety: transmuting between vectors is safe
                 unsafe { core::mem::transmute_copy(&bytes) }
             }
 
             /// Create an integer value from its representation as a byte array in big endian.
+            #[inline]
             pub fn from_be_bytes(bytes: crate::simd::Simd<u8, {{ $size * LANES }}>) -> Self {
                 let bytes = if cfg!(target_endian = "big") {
                     bytes
@@ -54,6 +59,7 @@ macro_rules! impl_to_bytes {
             }
 
             /// Create an integer value from its representation as a byte array in little endian.
+            #[inline]
             pub fn from_le_bytes(bytes: crate::simd::Simd<u8, {{ $size * LANES }}>) -> Self {
                 let bytes = if cfg!(target_endian = "little") {
                     bytes

crates/core_simd/src/vendor.rs

@@ -21,7 +21,7 @@ macro_rules! from_transmute {
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 mod x86;
 
-#[cfg(any(target_arch = "wasm32"))]
+#[cfg(target_arch = "wasm32")]
 mod wasm32;
 
 #[cfg(any(target_arch = "aarch64", target_arch = "arm",))]

crates/core_simd/src/vendor/x86.rs

@@ -1,6 +1,6 @@
 use crate::simd::*;
 
-#[cfg(any(target_arch = "x86"))]
+#[cfg(target_arch = "x86")]
 use core::arch::x86::*;
 
 #[cfg(target_arch = "x86_64")]