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lines changed Original file line number Diff line number Diff line change @@ -476,6 +476,37 @@ pub trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
476476 this. machine . alloc_addresses . get_mut ( ) . exposed . iter ( ) . copied ( ) . collect ( ) ;
477477 this. prepare_for_native_call ( exposed)
478478 }
479+
480+ /// Similar to `prepare_exposed_for_native_call`, but makes use of information obtained about
481+ /// memory accesses during FFI to determine which provenances should be exposed and which
482+ /// new allocations were created and possibly exposed.
483+ fn apply_events ( & mut self , events : crate :: shims:: trace:: MemEvents ) -> InterpResult < ' tcx > {
484+ let this = self . eval_context_mut ( ) ;
485+ //let accesses = events.accesses;
486+ let handle = this. machine . alloc_addresses . borrow ( ) ;
487+ for id in & handle. exposed {
488+ let & base_addr = handle. base_addr . get ( id) . unwrap ( ) ;
489+ let info = this. get_alloc_info ( * id) ;
490+
491+ //let found = vec![];
492+ for ( acc_base, acc_len, acc_kind) in & events. accesses {
493+ // If ranges overlap
494+ if * acc_base <= base_addr. strict_add ( info. size . bytes ( ) )
495+ && base_addr <= acc_base. strict_add ( * acc_len)
496+ {
497+ if info. mutbl . is_not ( ) && acc_kind. did_write ( ) {
498+ throw_ub_format ! ( "" ) ; // TODO: fill this in lol
499+ }
500+
501+ if acc_kind. did_write ( ) {
502+
503+ }
504+ }
505+ }
506+ }
507+
508+ interp_ok ( ( ) )
509+ }
479510}
480511
481512impl < ' tcx > MiriMachine < ' tcx > {
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