Support inline asm on AArch64

bjorn3 · bjorn3 · commit b1421dea1d9f · 2023-10-05T19:06:08.000Z
Also stop changing the frame pointer on x86_64. This confuses unwinders.
diff --git a/example/mini_core.rs b/example/mini_core.rs
@@ -683,6 +683,12 @@ pub macro cfg() {
     /* compiler built-in */
 }
 
+#[rustc_builtin_macro]
+#[rustc_macro_transparency = "semitransparent"]
+pub macro asm() {
+    /* compiler built-in */
+}
+
 #[rustc_builtin_macro]
 #[rustc_macro_transparency = "semitransparent"]
 pub macro global_asm() {
diff --git a/src/global_asm.rs b/src/global_asm.rs
@@ -9,16 +9,22 @@ use std::sync::Arc;
 use rustc_ast::{InlineAsmOptions, InlineAsmTemplatePiece};
 use rustc_hir::{InlineAsmOperand, ItemId};
 use rustc_session::config::{OutputFilenames, OutputType};
+use rustc_target::asm::InlineAsmArch;
 
 use crate::prelude::*;
 
 pub(crate) fn codegen_global_asm_item(tcx: TyCtxt<'_>, global_asm: &mut String, item_id: ItemId) {
     let item = tcx.hir().item(item_id);
     if let rustc_hir::ItemKind::GlobalAsm(asm) = item.kind {
-        if !asm.options.contains(InlineAsmOptions::ATT_SYNTAX) {
-            global_asm.push_str("\n.intel_syntax noprefix\n");
-        } else {
-            global_asm.push_str("\n.att_syntax\n");
+        let is_x86 =
+            matches!(tcx.sess.asm_arch.unwrap(), InlineAsmArch::X86 | InlineAsmArch::X86_64);
+
+        if is_x86 {
+            if !asm.options.contains(InlineAsmOptions::ATT_SYNTAX) {
+                global_asm.push_str("\n.intel_syntax noprefix\n");
+            } else {
+                global_asm.push_str("\n.att_syntax\n");
+            }
         }
         for piece in asm.template {
             match *piece {
@@ -65,7 +71,11 @@ pub(crate) fn codegen_global_asm_item(tcx: TyCtxt<'_>, global_asm: &mut String,
                 }
             }
         }
-        global_asm.push_str("\n.att_syntax\n\n");
+
+        global_asm.push('\n');
+        if is_x86 {
+            global_asm.push_str(".att_syntax\n\n");
+        }
     } else {
         bug!("Expected GlobalAsm found {:?}", item);
     }
@@ -115,11 +125,12 @@ pub(crate) fn compile_global_asm(
     }
 
     // Remove all LLVM style comments
-    let global_asm = global_asm
+    let mut global_asm = global_asm
         .lines()
         .map(|line| if let Some(index) = line.find("//") { &line[0..index] } else { line })
         .collect::<Vec<_>>()
         .join("\n");
+    global_asm.push('\n');
 
     let output_object_file = config.output_filenames.temp_path(OutputType::Object, Some(cgu_name));
 
diff --git a/src/inline_asm.rs b/src/inline_asm.rs
@@ -701,21 +701,32 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
         match arch {
             InlineAsmArch::X86_64 => {
                 generated_asm.push_str("    push rbp\n");
-                generated_asm.push_str("    mov rbp,rdi\n");
+                generated_asm.push_str("    mov rbp,rsp\n");
+                generated_asm.push_str("    push rbx\n"); // rbx is callee saved
+                // rbx is reserved by LLVM for the "base pointer", so rustc doesn't allow using it
+                generated_asm.push_str("    mov rbx,rdi\n");
             }
             InlineAsmArch::RiscV64 => {
                 generated_asm.push_str("    addi sp, sp, -16\n");
                 generated_asm.push_str("    sd ra, 8(sp)\n");
                 generated_asm.push_str("    sd s0, 0(sp)\n");
                 generated_asm.push_str("    mv s0, a0\n");
             }
+            InlineAsmArch::AArch64 => {
+                generated_asm.push_str("    stp fp, lr, [sp, #-32]!\n");
+                generated_asm.push_str("    mov fp, sp\n");
+                generated_asm.push_str("    str x19, [sp, #24]\n"); // x19 is callee saved
+                // x19 is reserved by LLVM for the "base pointer", so rustc doesn't allow using it
+                generated_asm.push_str("    mov x19, x0\n");
+            }
             _ => unimplemented!("prologue for {:?}", arch),
         }
     }
 
     fn epilogue(generated_asm: &mut String, arch: InlineAsmArch) {
         match arch {
             InlineAsmArch::X86_64 => {
+                generated_asm.push_str("    pop rbx\n");
                 generated_asm.push_str("    pop rbp\n");
                 generated_asm.push_str("    ret\n");
             }
@@ -725,6 +736,11 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
                 generated_asm.push_str("    addi sp, sp, 16\n");
                 generated_asm.push_str("    ret\n");
             }
+            InlineAsmArch::AArch64 => {
+                generated_asm.push_str("    ldr x19, [sp, #24]\n");
+                generated_asm.push_str("    ldp fp, lr, [sp], #32\n");
+                generated_asm.push_str("    ret\n");
+            }
             _ => unimplemented!("epilogue for {:?}", arch),
         }
     }
@@ -737,6 +753,9 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
             InlineAsmArch::RiscV64 => {
                 generated_asm.push_str("    ebreak\n");
             }
+            InlineAsmArch::AArch64 => {
+                generated_asm.push_str("    brk     #0x1");
+            }
             _ => unimplemented!("epilogue_noreturn for {:?}", arch),
         }
     }
@@ -749,7 +768,7 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
     ) {
         match arch {
             InlineAsmArch::X86_64 => {
-                write!(generated_asm, "    mov [rbp+0x{:x}], ", offset.bytes()).unwrap();
+                write!(generated_asm, "    mov [rbx+0x{:x}], ", offset.bytes()).unwrap();
                 reg.emit(generated_asm, InlineAsmArch::X86_64, None).unwrap();
                 generated_asm.push('\n');
             }
@@ -758,6 +777,11 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
                 reg.emit(generated_asm, InlineAsmArch::RiscV64, None).unwrap();
                 writeln!(generated_asm, ", 0x{:x}(s0)", offset.bytes()).unwrap();
             }
+            InlineAsmArch::AArch64 => {
+                generated_asm.push_str("    str ");
+                reg.emit(generated_asm, InlineAsmArch::AArch64, None).unwrap();
+                writeln!(generated_asm, ", [x19, 0x{:x}]", offset.bytes()).unwrap();
+            }
             _ => unimplemented!("save_register for {:?}", arch),
         }
     }
@@ -772,13 +796,18 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {
             InlineAsmArch::X86_64 => {
                 generated_asm.push_str("    mov ");
                 reg.emit(generated_asm, InlineAsmArch::X86_64, None).unwrap();
-                writeln!(generated_asm, ", [rbp+0x{:x}]", offset.bytes()).unwrap();
+                writeln!(generated_asm, ", [rbx+0x{:x}]", offset.bytes()).unwrap();
             }
             InlineAsmArch::RiscV64 => {
                 generated_asm.push_str("    ld ");
                 reg.emit(generated_asm, InlineAsmArch::RiscV64, None).unwrap();
                 writeln!(generated_asm, ", 0x{:x}(s0)", offset.bytes()).unwrap();
             }
+            InlineAsmArch::AArch64 => {
+                generated_asm.push_str("    ldr ");
+                reg.emit(generated_asm, InlineAsmArch::AArch64, None).unwrap();
+                writeln!(generated_asm, ", [x19, 0x{:x}]", offset.bytes()).unwrap();
+            }
             _ => unimplemented!("restore_register for {:?}", arch),
         }
     }

Original file line number	Diff line number	Diff line change
`@@ -701,21 +701,32 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {`
`701`	`701`	`match arch {`
`702`	`702`	`InlineAsmArch::X86_64 => {`
`703`	`703`	`generated_asm.push_str(" push rbp\n");`
`704`		`- generated_asm.push_str(" mov rbp,rdi\n");`
	`704`	`+ generated_asm.push_str(" mov rbp,rsp\n");`
	`705`	`+ generated_asm.push_str(" push rbx\n"); // rbx is callee saved`
	`706`	`+ // rbx is reserved by LLVM for the "base pointer", so rustc doesn't allow using it`
	`707`	`+ generated_asm.push_str(" mov rbx,rdi\n");`
`705`	`708`	`}`
`706`	`709`	`InlineAsmArch::RiscV64 => {`
`707`	`710`	`generated_asm.push_str(" addi sp, sp, -16\n");`
`708`	`711`	`generated_asm.push_str(" sd ra, 8(sp)\n");`
`709`	`712`	`generated_asm.push_str(" sd s0, 0(sp)\n");`
`710`	`713`	`generated_asm.push_str(" mv s0, a0\n");`
`711`	`714`	`}`
	`715`	`+ InlineAsmArch::AArch64 => {`
	`716`	`+ generated_asm.push_str(" stp fp, lr, [sp, #-32]!\n");`
	`717`	`+ generated_asm.push_str(" mov fp, sp\n");`
	`718`	`+ generated_asm.push_str(" str x19, [sp, #24]\n"); // x19 is callee saved`
	`719`	`+ // x19 is reserved by LLVM for the "base pointer", so rustc doesn't allow using it`
	`720`	`+ generated_asm.push_str(" mov x19, x0\n");`
	`721`	`+ }`
`712`	`722`	`_ => unimplemented!("prologue for {:?}", arch),`
`713`	`723`	`}`
`714`	`724`	`}`
`715`	`725`
`716`	`726`	`fn epilogue(generated_asm: &mut String, arch: InlineAsmArch) {`
`717`	`727`	`match arch {`
`718`	`728`	`InlineAsmArch::X86_64 => {`
	`729`	`+ generated_asm.push_str(" pop rbx\n");`
`719`	`730`	`generated_asm.push_str(" pop rbp\n");`
`720`	`731`	`generated_asm.push_str(" ret\n");`
`721`	`732`	`}`
`@@ -725,6 +736,11 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {`
`725`	`736`	`generated_asm.push_str(" addi sp, sp, 16\n");`
`726`	`737`	`generated_asm.push_str(" ret\n");`
`727`	`738`	`}`
	`739`	`+ InlineAsmArch::AArch64 => {`
	`740`	`+ generated_asm.push_str(" ldr x19, [sp, #24]\n");`
	`741`	`+ generated_asm.push_str(" ldp fp, lr, [sp], #32\n");`
	`742`	`+ generated_asm.push_str(" ret\n");`
	`743`	`+ }`
`728`	`744`	`_ => unimplemented!("epilogue for {:?}", arch),`
`729`	`745`	`}`
`730`	`746`	`}`
`@@ -737,6 +753,9 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {`
`737`	`753`	`InlineAsmArch::RiscV64 => {`
`738`	`754`	`generated_asm.push_str(" ebreak\n");`
`739`	`755`	`}`
	`756`	`+ InlineAsmArch::AArch64 => {`
	`757`	`+ generated_asm.push_str(" brk #0x1");`
	`758`	`+ }`
`740`	`759`	`_ => unimplemented!("epilogue_noreturn for {:?}", arch),`
`741`	`760`	`}`
`742`	`761`	`}`
`@@ -749,7 +768,7 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {`
`749`	`768`	`) {`
`750`	`769`	`match arch {`
`751`	`770`	`InlineAsmArch::X86_64 => {`
`752`		`- write!(generated_asm, " mov [rbp+0x{:x}], ", offset.bytes()).unwrap();`
	`771`	`+ write!(generated_asm, " mov [rbx+0x{:x}], ", offset.bytes()).unwrap();`
`753`	`772`	`reg.emit(generated_asm, InlineAsmArch::X86_64, None).unwrap();`
`754`	`773`	`generated_asm.push('\n');`
`755`	`774`	`}`
`@@ -758,6 +777,11 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {`
`758`	`777`	`reg.emit(generated_asm, InlineAsmArch::RiscV64, None).unwrap();`
`759`	`778`	`writeln!(generated_asm, ", 0x{:x}(s0)", offset.bytes()).unwrap();`
`760`	`779`	`}`
	`780`	`+ InlineAsmArch::AArch64 => {`
	`781`	`+ generated_asm.push_str(" str ");`
	`782`	`+ reg.emit(generated_asm, InlineAsmArch::AArch64, None).unwrap();`
	`783`	`+ writeln!(generated_asm, ", [x19, 0x{:x}]", offset.bytes()).unwrap();`
	`784`	`+ }`
`761`	`785`	`_ => unimplemented!("save_register for {:?}", arch),`
`762`	`786`	`}`
`763`	`787`	`}`
`@@ -772,13 +796,18 @@ impl<'tcx> InlineAssemblyGenerator<'_, 'tcx> {`
`772`	`796`	`InlineAsmArch::X86_64 => {`
`773`	`797`	`generated_asm.push_str(" mov ");`
`774`	`798`	`reg.emit(generated_asm, InlineAsmArch::X86_64, None).unwrap();`
`775`		`- writeln!(generated_asm, ", [rbp+0x{:x}]", offset.bytes()).unwrap();`
	`799`	`+ writeln!(generated_asm, ", [rbx+0x{:x}]", offset.bytes()).unwrap();`
`776`	`800`	`}`
`777`	`801`	`InlineAsmArch::RiscV64 => {`
`778`	`802`	`generated_asm.push_str(" ld ");`
`779`	`803`	`reg.emit(generated_asm, InlineAsmArch::RiscV64, None).unwrap();`
`780`	`804`	`writeln!(generated_asm, ", 0x{:x}(s0)", offset.bytes()).unwrap();`
`781`	`805`	`}`
	`806`	`+ InlineAsmArch::AArch64 => {`
	`807`	`+ generated_asm.push_str(" ldr ");`
	`808`	`+ reg.emit(generated_asm, InlineAsmArch::AArch64, None).unwrap();`
	`809`	`+ writeln!(generated_asm, ", [x19, 0x{:x}]", offset.bytes()).unwrap();`
	`810`	`+ }`
`782`	`811`	`_ => unimplemented!("restore_register for {:?}", arch),`
`783`	`812`	`}`
`784`	`813`	`}`