wording tweaks

Author: RalfJung

src/tools/miri/src/shims/x86/sse.rs

@@ -144,7 +144,7 @@ pub(super) trait EvalContextExt<'mir, 'tcx: 'mir>:
                 // The difference between the com* and ucom* variants is signaling
                 // of exceptions when either argument is a quiet NaN. We do not
                 // support accessing the SSE status register from miri (or from Rust,
-                // for that matter), so we treat equally both variants.
+                // for that matter), so we treat both variants equally.
                 let res = match unprefixed_name {
                     "comieq.ss" | "ucomieq.ss" => left == right,
                     "comilt.ss" | "ucomilt.ss" => left < right,

src/tools/miri/src/shims/x86/sse2.rs

@@ -640,7 +640,7 @@ pub(super) trait EvalContextExt<'mir, 'tcx: 'mir>:
                 // The difference between the com* and ucom* variants is signaling
                 // of exceptions when either argument is a quiet NaN. We do not
                 // support accessing the SSE status register from miri (or from Rust,
-                // for that matter), so we treat equally both variants.
+                // for that matter), so we treat both variants equally.
                 let res = match unprefixed_name {
                     "comieq.sd" | "ucomieq.sd" => left == right,
                     "comilt.sd" | "ucomilt.sd" => left < right,