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lines changed Original file line number Diff line number Diff line change 223223//! /// Inter-integrated circuit
224224//! pub mod i2c1 {
225225//! /// Register block
226+ //! #[repr(C)]
226227//! pub struct RegisterBlock {
228+ //! cr1: CR1,
229+ //! cr2: CR2,
230+ //! oar1: OAR1,
231+ //! oar2: OAR2,
232+ //! dr: DR,
233+ //! }
234+ //! impl RegisterBlock {
227235//! /// 0x00 - Control register 1
228- //! pub cr1: CR1,
236+ //! #[inline(always)]
237+ //! pub const fn cr1(&self) -> &CR1 {
238+ //! &self.cr1
239+ //! }
229240//! /// 0x04 - Control register 2
230- //! pub cr2: CR2,
241+ //! #[inline(always)]
242+ //! pub const fn cr2(&self) -> &CR2 {
243+ //! &self.cr2
244+ //! }
231245//! /// 0x08 - Own address register 1
232- //! pub oar1: OAR1,
233- //! /// 0x0c - Own address register 2
234- //! pub oar2: OAR2,
235- //! /// 0x10 - Timing register
236- //! pub timingr: TIMINGR,
237- //! /// Status register 1
238- //! pub timeoutr: TIMEOUTR,
239- //! /// Interrupt and Status register
240- //! pub isr: ISR,
241- //! /// 0x1c - Interrupt clear register
242- //! pub icr: ICR,
243- //! /// 0x20 - PEC register
244- //! pub pecr: PECR,
245- //! /// 0x24 - Receive data register
246- //! pub rxdr: RXDR,
247- //! /// 0x28 - Transmit data register
248- //! pub txdr: TXDR,
246+ //! #[inline(always)]
247+ //! pub const fn oar1(&self) -> &OAR1 {
248+ //! &self.oar1
249+ //! }
250+ //! #[doc = "0x0c - Own address register 2"]
251+ //! #[inline(always)]
252+ //! pub const fn oar2(&self) -> &OAR2 {
253+ //! &self.oar2
254+ //! }
255+ //! #[doc = "0x10 - Data register"]
256+ //! #[inline(always)]
257+ //! pub const fn dr(&self) -> &DR {
258+ //! &self.dr
259+ //! }
249260//! }
250261//! }
251262//! ```
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