Merge pull request #757 from rust-embedded/optional-irq

reexport features

Author: burrbull

CHANGELOG.md

@@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/).
 
 ## [Unreleased]
 
+- Add `reexport_core_peripherals` and `reexport_interrupt` features disabled by default
 - rename `const-generic` feature to `array_proxy`
 - `FieldWriter` takes offset as struct field instead of const generic.
   Improves SVD field array access

src/generate/device.rs

@@ -103,46 +103,51 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result<Toke
 
     let mut fields = TokenStream::new();
     let mut exprs = TokenStream::new();
-    if config.target == Target::CortexM {
-        out.extend(quote! {
-            pub use cortex_m::peripheral::Peripherals as CorePeripherals;
-            #[cfg(feature = "rt")]
-            pub use cortex_m_rt::interrupt;
-            #[cfg(feature = "rt")]
-            pub use self::Interrupt as interrupt;
-        });
+    match config.target {
+        Target::CortexM => {
+            if config.reexport_core_peripherals {
+                let fpu = fpu_present.then(|| quote!(FPU,));
+                out.extend(quote! {
+                    pub use cortex_m::peripheral::Peripherals as CorePeripherals;
+                    pub use cortex_m::peripheral::{
+                        CBP, CPUID, DCB, DWT, FPB, #fpu ITM, MPU, NVIC, SCB, SYST, TPIU,
+                    };
+                });
+            }
 
-        if fpu_present {
-            out.extend(quote! {
-                pub use cortex_m::peripheral::{
-                    CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU,
-                };
-            });
-        } else {
-            out.extend(quote! {
-                pub use cortex_m::peripheral::{
-                    CBP, CPUID, DCB, DWT, FPB, ITM, MPU, NVIC, SCB, SYST, TPIU,
-                };
-            });
+            if config.reexport_interrupt {
+                out.extend(quote! {
+                    #[cfg(feature = "rt")]
+                    pub use cortex_m_rt::interrupt;
+                    #[cfg(feature = "rt")]
+                    pub use self::Interrupt as interrupt;
+                });
+            }
         }
-    }
 
-    if config.target == Target::Msp430 {
-        out.extend(quote! {
+        Target::Msp430 => {
             // XXX: Are there any core peripherals, really? Requires bump of msp430 crate.
             // pub use msp430::peripheral::Peripherals as CorePeripherals;
-            #[cfg(feature = "rt")]
-            pub use msp430_rt::interrupt;
-            #[cfg(feature = "rt")]
-            pub use self::Interrupt as interrupt;
-        });
-    }
+            if config.reexport_interrupt {
+                out.extend(quote! {
+                    #[cfg(feature = "rt")]
+                    pub use msp430_rt::interrupt;
+                    #[cfg(feature = "rt")]
+                    pub use self::Interrupt as interrupt;
+                });
+            }
+        }
 
-    if config.target == Target::Mips {
-        out.extend(quote! {
-            #[cfg(feature = "rt")]
-            pub use mips_rt::interrupt;
-        });
+        Target::Mips => {
+            if config.reexport_interrupt {
+                out.extend(quote! {
+                    #[cfg(feature = "rt")]
+                    pub use mips_rt::interrupt;
+                });
+            }
+        }
+
+        _ => {}
     }
 
     let generic_file = include_str!("generic.rs");

src/main.rs

@@ -163,6 +163,18 @@ fn run() -> Result<()> {
                 .long("source_type")
                 .help("Specify file/stream format"),
         )
+        .arg(
+            Arg::new("reexport_core_peripherals")
+                .long("reexport_core_peripherals")
+                .action(ArgAction::SetTrue)
+                .help("For Cortex-M target reexport peripherals from cortex-m crate"),
+        )
+        .arg(
+            Arg::new("reexport_interrupt")
+                .long("reexport_interrupt")
+                .action(ArgAction::SetTrue)
+                .help("Reexport interrupt macro from cortex-m-rt like crates"),
+        )
         .arg(
             Arg::new("log_level")
                 .long("log")

src/util.rs

@@ -65,6 +65,10 @@ pub struct Config {
     pub log_level: Option<String>,
     #[cfg_attr(feature = "serde", serde(default))]
     pub interrupt_link_section: Option<String>,
+    #[cfg_attr(feature = "serde", serde(default))]
+    pub reexport_core_peripherals: bool,
+    #[cfg_attr(feature = "serde", serde(default))]
+    pub reexport_interrupt: bool,
 }
 
 #[derive(Clone, Debug, PartialEq, Eq)]
@@ -129,6 +133,8 @@ impl Default for Config {
             source_type: SourceType::default(),
             log_level: None,
             interrupt_link_section: None,
+            reexport_core_peripherals: false,
+            reexport_interrupt: false,
         }
     }
 }