add device.x linker script for riscv targets, and provides __EXTERNAL_INTERRUPTS vector table in pacs for device specific interrupt management

Author: alexismarquet

src/generate/interrupt.rs

@@ -125,7 +125,35 @@ pub fn render(
                     ];
             });
         }
-        Target::RISCV => {}
+        Target::RISCV => {
+            for name in &names {
+                writeln!(
+                    device_x,
+                    "PROVIDE({} = DefaultExternalInterruptHandler);",
+                    name
+                )?;
+            }
+
+            root.extend(quote! {
+                #[cfg(feature = "rt")]
+                extern "C" {
+                    #(fn #names();)*
+                }
+
+                #[doc(hidden)]
+                pub union Vector {
+                    pub _handler: unsafe extern "C" fn(),
+                    pub _reserved: usize,
+                }
+
+                #[cfg(feature = "rt")]
+                #[doc(hidden)]
+                #[no_mangle]
+                pub static __EXTERNAL_INTERRUPTS: [Vector; #n] = [
+                    #elements
+                ];
+            });
+        }
         Target::XtensaLX => {
             for name in &names {
                 writeln!(device_x, "PROVIDE({} = DefaultHandler);", name)?;

src/main.rs

@@ -160,7 +160,11 @@ fn run() -> Result<()> {
     file.write_all(data.as_ref())
         .expect("Could not write code to lib.rs");
 
-    if target == Target::CortexM || target == Target::Msp430 || target == Target::XtensaLX {
+    if target == Target::CortexM
+        || target == Target::Msp430
+        || target == Target::XtensaLX
+        || target == Target::RISCV
+    {
         writeln!(File::create(path.join("device.x"))?, "{}", device_x)?;
         writeln!(File::create(path.join("build.rs"))?, "{}", build_rs())?;
     }