Added tests for ESP32

Author: arjanmels

ci/script.sh

@@ -692,6 +692,17 @@ main() {
             # OK
             test_svd M061
         ;;
+
+        Espressif)
+            echo '[dependencies.bare-metal]' >> $td/Cargo.toml
+            echo 'version = "0.2.0"' >> $td/Cargo.toml
+
+            echo '[dependencies.xtensa-lx6-rt]' >> $td/Cargo.toml
+            echo 'git = "https://github.com/esp-rs/xtensa-lx6-rt.git"' >> $td/Cargo.toml
+
+            test_svd_for_target esp32 https://raw.githubusercontent.com/arjanmels/esp32/add-output-svd/svd/esp32.svd
+        ;;
+
     esac
 
     rm -rf $td

ci/svd2rust-regress/README.md

@@ -60,8 +60,7 @@ FLAGS:
 
 OPTIONS:
     -a, --architecture <arch>
-            Filter by architecture, case sensitive, may be combined with other filters Options are: "CortexM", "RiscV",
-            and "Msp430"
+            Filter by architecture, case sensitive, may be combined with other filters Options are: "CortexM", "RiscV", "Msp430" and "ESP32"
     -p, --svd2rust-path <bin_path>
             Path to an `svd2rust` binary, relative or absolute. Defaults to `target/release/svd2rust[.exe]` of this
             repository (which must be already built)

ci/svd2rust-regress/src/svd_test.rs

@@ -10,6 +10,8 @@ static CRATES_ALL: &[&str] = &["bare-metal = \"0.2.0\"", "vcell = \"0.1.0\""];
 static CRATES_MSP430: &[&str] = &["msp430 = \"0.1.0\""];
 static CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.5.0\"", "cortex-m-rt = \"0.5.0\""];
 static CRATES_RISCV: &[&str] = &["riscv = \"0.4.0\"", "riscv-rt = \"0.4.0\""];
+static CRATES_ESP32: &[&str] =
+    &["xtensa-lx6-rt = {git=\"https://github.com/esp-rs/xtensa-lx6-rt\"}"];
 static PROFILE_ALL: &[&str] = &["[profile.dev]", "incremental = false"];
 static FEATURES_ALL: &[&str] = &["[features]"];
 static FEATURES_CORTEX_M: &[&str] =
@@ -133,6 +135,7 @@ pub fn test(
             CortexM => CRATES_CORTEX_M.iter(),
             RiscV => CRATES_RISCV.iter(),
             Msp430 => CRATES_MSP430.iter(),
+            ESP32 => CRATES_ESP32.iter(),
         })
         .chain(PROFILE_ALL.iter())
         .chain(FEATURES_ALL.iter())
@@ -165,6 +168,7 @@ pub fn test(
         CortexM => "cortex-m",
         Msp430 => "msp430",
         RiscV => "riscv",
+        ESP32 => "esp32",
     };
     let mut svd2rust_bin = Command::new(bin_path);
     if nightly {
@@ -180,14 +184,15 @@ pub fn test(
     output.capture_outputs(
         true,
         "svd2rust",
-        Some(&lib_rs_file).filter(|_| (t.arch != CortexM) && (t.arch != Msp430)),
+        Some(&lib_rs_file)
+            .filter(|_| (t.arch != CortexM) && (t.arch != Msp430) && (t.arch != ESP32)),
         Some(&svd2rust_err_file),
         &[],
     )?;
     process_stderr_paths.push(svd2rust_err_file);
 
     match t.arch {
-        CortexM | Msp430 => {
+        CortexM | Msp430 | ESP32 => {
             // TODO: Give error the path to stderr
             fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file)
                 .chain_err(|| "While moving lib.rs file")?

ci/svd2rust-regress/src/tests.rs

@@ -7,6 +7,7 @@ pub enum Architecture {
     CortexM,
     Msp430,
     RiscV,
+    ESP32,
 }
 
 #[derive(Debug)]
@@ -24,6 +25,7 @@ pub enum Manufacturer {
     Toshiba,
     SiFive,
     TexasInstruments,
+    Espressif,
 }
 
 #[derive(Debug)]
@@ -4226,4 +4228,14 @@ pub const TESTS: &[&TestCase] = &[
         should_pass: true,
         run_when: Always,
     },
+    &TestCase {
+        arch: ESP32,
+        mfgr: Espressif,
+        chip: "esp32",
+        svd_url: Some(
+            "https://raw.githubusercontent.com/arjanmels/esp32/add-output-svd/svd/esp32.svd",
+        ),
+        should_pass: true,
+        run_when: Always,
+    },
 ];