riscv-peripheral v0.4.0

Author: romancardenas

riscv-peripheral/CHANGELOG.md

@@ -7,11 +7,17 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+## [v0.4.0] - 2025-09-04
+
 ### Added
 
 - Constant methods to access to PLIC and ACLINT registers for HART 0.
   These new methods are especially convenient for single-HART targets.
 
+### Removed
+
+- Removed `riscv` reexport.
+
 ## [v0.3.0] - 2025-06-10
 
 ### Changed

riscv-peripheral/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "riscv-peripheral"
-version = "0.3.0"
+version = "0.4.0"
 edition = "2021"
 rust-version = "1.75"
 repository = "https://github.com/rust-embedded/riscv"
@@ -16,7 +16,7 @@ license = "ISC"
 [dependencies]
 embedded-hal = "1.0.0"
 paste = "1.0"
-riscv = { path = "../riscv", version = "0.14.0" }
+riscv = { path = "../riscv", version = "0.15.0" }
 riscv-pac = { path = "../riscv-pac", version = "0.2.0" }
 
 [package.metadata.docs.rs]

riscv-peripheral/src/lib.rs

@@ -3,7 +3,6 @@
 #![deny(missing_docs)]
 #![no_std]
 
-pub use riscv; // re-export riscv crate to allow macros to use it
 pub use riscv_pac::result; // re-export the result module
 
 pub mod common; // common definitions for all peripherals