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Revert "support for S-mode interrupts"
This reverts commit 41c50dd.
1 parent 41c50dd commit 4ad4cfd

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6 files changed

+53
-118
lines changed

6 files changed

+53
-118
lines changed

‎.github/workflows/riscv.yaml‎

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
on:
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push:
3-
branches: [ master, riscv-pac ]
3+
branches: [ master ]
44
pull_request:
55
merge_group:
66

@@ -31,12 +31,8 @@ jobs:
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with:
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toolchain: ${{ matrix.toolchain }}
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targets: ${{ matrix.target }}
34-
- name: Build (M-mode)
34+
- name: Build (no features)
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run: cargo build --package riscv --target ${{ matrix.target }}
36-
- name: Build (M-mode, critical section)
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run: cargo build --package riscv --target ${{ matrix.target }} --features=critical-section-single-hart
38-
- name: Build (S-mode)
39-
run: cargo build --package riscv --target ${{ matrix.target }} --features=s-mode
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- name: Build (all features)
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run: cargo build --package riscv --target ${{ matrix.target }} --all-features
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‎riscv/CHANGELOG.md‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
99

1010
### Added
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12-
- `s-mode` feature for reexporting `machine::supervisor` or `interrupt::supervisor` to `interrupt`
13-
- Support for supervisor-level interrupts in `interrupt::supervisor`
1412
- Add CI workflow to check that CHANGELOG.md file has been modified in PRs
1513
- Add `read_csr_as_rv32`, `set_rv32`, and `clear_rv32` macros
1614
- Add `mstatus::uxl` and `mstatus::sxl`
@@ -22,8 +20,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
2220

2321
### Changed
2422

25-
- `critical-section` implementation depends on `s-mode` feature
26-
- machine-level interrupt functions moved to `interrupt::machine`
2723
- Cargo workspace for riscv and riscv-rt
2824
- Update `embedded-hal` dependency to v1.0.0-rc.2 (bumps MSRV to 1.60)
2925
- `misa::MXL` renamed to `misa::XLEN`

‎riscv/Cargo.toml‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,6 @@ targets = [
2020
]
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2222
[features]
23-
s-mode = []
2423
critical-section-single-hart = ["critical-section/restore-state-bool"]
2524

2625
[dependencies]

‎riscv/src/critical_section.rs‎

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,23 +1,16 @@
11
use critical_section::{set_impl, Impl, RawRestoreState};
22

33
use crate::interrupt;
4+
use crate::register::mstatus;
45

56
struct SingleHartCriticalSection;
67
set_impl!(SingleHartCriticalSection);
78

89
unsafe impl Impl for SingleHartCriticalSection {
9-
#[cfg(not(feature = "s-mode"))]
1010
unsafe fn acquire() -> RawRestoreState {
1111
let mut mstatus: usize;
1212
core::arch::asm!("csrrci {}, mstatus, 0b1000", out(reg) mstatus);
13-
core::mem::transmute::<_, crate::register::mstatus::Mstatus>(mstatus).mie()
14-
}
15-
16-
#[cfg(feature = "s-mode")]
17-
unsafe fn acquire() -> RawRestoreState {
18-
let mut sstatus: usize;
19-
core::arch::asm!("csrrci {}, sstatus, 0b0010", out(reg) sstatus);
20-
core::mem::transmute::<_, crate::register::sstatus::Sstatus>(sstatus).sie()
13+
core::mem::transmute::<_, mstatus::Mstatus>(mstatus).mie()
2114
}
2215

2316
unsafe fn release(was_active: RawRestoreState) {

‎riscv/src/interrupt.rs‎

Lines changed: 49 additions & 91 deletions
Original file line numberDiff line numberDiff line change
@@ -1,105 +1,63 @@
11
//! Interrupts
22
33
// NOTE: Adapted from cortex-m/src/interrupt.rs
4-
5-
pub mod machine {
6-
use crate::register::mstatus;
7-
8-
/// Disables all interrupts in the current hart (machine mode).
9-
#[inline]
10-
pub fn disable() {
11-
unsafe { mstatus::clear_mie() }
12-
}
13-
14-
/// Enables all the interrupts in the current hart (machine mode).
15-
///
16-
/// # Safety
17-
///
18-
/// Do not call this function inside a critical section.
19-
#[inline]
20-
pub unsafe fn enable() {
21-
mstatus::set_mie()
22-
}
23-
24-
/// Execute closure `f` with interrupts disabled in the current hart (machine mode).
25-
///
26-
/// This method does not synchronise multiple harts, so it is not suitable for
27-
/// using as a critical section. See the `critical-section` crate for a cross-platform
28-
/// way to enter a critical section which provides a `CriticalSection` token.
29-
///
30-
/// This crate provides an implementation for `critical-section` suitable for single-hart systems,
31-
/// based on disabling all interrupts. It can be enabled with the `critical-section-single-hart` feature.
32-
#[inline]
33-
pub fn free<F, R>(f: F) -> R
34-
where
35-
F: FnOnce() -> R,
36-
{
37-
let mstatus = mstatus::read();
38-
39-
// disable interrupts
40-
disable();
41-
42-
let r = f();
43-
44-
// If the interrupts were active before our `disable` call, then re-enable
45-
// them. Otherwise, keep them disabled
46-
if mstatus.mie() {
47-
unsafe { enable() };
48-
}
49-
50-
r
4+
use crate::register::mstatus;
5+
6+
/// Disables all interrupts in the current hart.
7+
#[inline]
8+
pub unsafe fn disable() {
9+
match () {
10+
#[cfg(riscv)]
11+
() => mstatus::clear_mie(),
12+
#[cfg(not(riscv))]
13+
() => unimplemented!(),
5114
}
5215
}
53-
pub mod supervisor {
54-
use crate::register::sstatus;
5516

56-
/// Disables all interrupts in the current hart (supervisor mode).
57-
#[inline]
58-
pub fn disable() {
59-
unsafe { sstatus::clear_sie() }
17+
/// Enables all the interrupts in the current hart.
18+
///
19+
/// # Safety
20+
///
21+
/// - Do not call this function inside a critical section.
22+
#[inline]
23+
pub unsafe fn enable() {
24+
match () {
25+
#[cfg(riscv)]
26+
() => mstatus::set_mie(),
27+
#[cfg(not(riscv))]
28+
() => unimplemented!(),
6029
}
30+
}
6131

62-
/// Enables all the interrupts in the current hart (supervisor mode).
63-
///
64-
/// # Safety
65-
///
66-
/// Do not call this function inside a critical section.
67-
#[inline]
68-
pub unsafe fn enable() {
69-
sstatus::set_sie()
70-
}
71-
72-
/// Execute closure `f` with interrupts disabled in the current hart (supervisor mode).
73-
///
74-
/// This method does not synchronise multiple harts, so it is not suitable for
75-
/// using as a critical section. See the `critical-section` crate for a cross-platform
76-
/// way to enter a critical section which provides a `CriticalSection` token.
77-
///
78-
/// This crate provides an implementation for `critical-section` suitable for single-hart systems,
79-
/// based on disabling all interrupts. It can be enabled with the `critical-section-single-hart` feature.
80-
#[inline]
81-
pub fn free<F, R>(f: F) -> R
82-
where
83-
F: FnOnce() -> R,
84-
{
85-
let sstatus = sstatus::read();
86-
87-
// disable interrupts
32+
/// Execute closure `f` with interrupts disabled in the current hart.
33+
///
34+
/// This method does not synchronise multiple harts, so it is not suitable for
35+
/// using as a critical section. See the `critical-section` crate for a cross-platform
36+
/// way to enter a critical section which provides a `CriticalSection` token.
37+
///
38+
/// This crate provides an implementation for `critical-section` suitable for single-hart systems,
39+
/// based on disabling all interrupts. It can be enabled with the `critical-section-single-hart` feature.
40+
#[inline]
41+
pub fn free<F, R>(f: F) -> R
42+
where
43+
F: FnOnce() -> R,
44+
{
45+
let mstatus = mstatus::read();
46+
47+
// disable interrupts
48+
unsafe {
8849
disable();
50+
}
8951

90-
let r = f();
52+
let r = f();
9153

92-
// If the interrupts were active before our `disable` call, then re-enable
93-
// them. Otherwise, keep them disabled
94-
if sstatus.sie() {
95-
unsafe { enable() };
54+
// If the interrupts were active before our `disable` call, then re-enable
55+
// them. Otherwise, keep them disabled
56+
if mstatus.mie() {
57+
unsafe {
58+
enable();
9659
}
97-
98-
r
9960
}
100-
}
10161

102-
#[cfg(not(feature = "s-mode"))]
103-
pub use machine::*;
104-
#[cfg(feature = "s-mode")]
105-
pub use supervisor::*;
62+
r
63+
}

‎riscv/src/lib.rs‎

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -15,17 +15,10 @@
1515
//!
1616
//! # Optional features
1717
//!
18-
//! ## `s-mode`
19-
//!
20-
//! This feature re-exports in `interrupt` S-mode interrupt functions defined in `interrupt::supervisor`.
21-
//! By default, the crate assumes that the target is running in M-mode.
22-
//! Thus, `interrupt` re-exports the M-mode functions defined in `interrupt::machine`.
23-
//!
2418
//! ## `critical-section-single-hart`
2519
//!
2620
//! This feature enables a [`critical-section`](https://github.com/rust-embedded/critical-section)
2721
//! implementation suitable for single-hart targets, based on disabling interrupts globally.
28-
//! This feature uses S-mode interrupt handling if the `s-mode` feature is enabled, and M-mode otherwise.
2922
//!
3023
//! It is **unsound** to enable it on multi-hart targets,
3124
//! and may cause functional problems in systems where some interrupts must NOT be disabled

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