Merge pull request #128 from ivq/fix_single_hart_stack

Fix setting incorrect sp if single-hart

Author: romancardenas

riscv-rt/CHANGELOG.md

@@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - New GitHub workflow for checking invalid labels in PRs
 - New GitHub workflow for checking modifications on CHANGELOG.md
 - New GitHub workflow for checking clippy lints in PRs
+- Optional cargo feature `single-hart` for single CPU targets
 
 ### Changed
 

riscv-rt/src/asm.rs

@@ -85,17 +85,16 @@ _abs_start:
     .option push
     .option norelax
     la gp, __global_pointer$
-    .option pop",
+    .option pop
+    // Allocate stacks",
     #[cfg(all(not(feature = "single-hart"), feature = "s-mode"))]
     "mv t2, a0 // the hartid is passed as parameter by SMODE",
     #[cfg(all(not(feature = "single-hart"), not(feature = "s-mode")))]
     "csrr t2, mhartid",
     #[cfg(not(feature = "single-hart"))]
     "lui t0, %hi(_max_hart_id)
     add t0, t0, %lo(_max_hart_id)
-    bgtu t2, t0, abort",
-    "// Allocate stacks
-    la sp, _stack_start
+    bgtu t2, t0, abort
     lui t0, %hi(_hart_stack_size)
     add t0, t0, %lo(_hart_stack_size)",
     #[cfg(all(not(feature = "single-hart"), riscvm))]
@@ -109,9 +108,10 @@ _abs_start:
     addi t1, t1, -1
     bnez t1, 1b
 2:  ",
-    "sub sp, sp, t0
-
-    // Set frame pointer
+    "la sp, _stack_start",
+    #[cfg(not(feature = "single-hart"))]
+    "sub sp, sp, t0",
+    "// Set frame pointer
     add s0, sp, zero
 
     jal zero, _start_rust

riscv-rt/src/lib.rs

@@ -327,7 +327,7 @@
 //!
 //! ## `single-hart`
 //!
-//! This feature saves a little code size by removing unnecessary stack space calculation if there is only one hart on the target.
+//! This feature saves a little code size if there is only one hart on the target.
 //!
 //! ## `s-mode`
 //!